-
1
-
-
85013969116
-
-
website
-
Altera, website, http://www.altera.com
-
-
-
-
2
-
-
84948763657
-
-
White Paper, June 00
-
Altera, Excalibur Backgrounder, http://www.altera.com/literature/wp/excal-bkgrnd.pdf, White Paper, June 00
-
Excalibur Backgrounder
-
-
-
3
-
-
14844355101
-
Analyzing heterogeneous system architectures by means of cost functions: A comparative study for basic operations
-
Blume, H.; Feldkämper, H.; Hübert, H.; Noll, T.G.: "Analyzing heterogeneous system architectures by means of cost functions: A comparative study for basic operations", Proc. ESSCIRC 2001, pp. 424-427
-
Proc. Esscirc 2001
, pp. 424-427
-
-
Blume, H.1
Feldkämper, H.2
Hübert, H.3
Noll, T.G.4
-
4
-
-
84893656062
-
Logic Depth and Power Consumption: A comparative Study Between Standard Cells and FPGAs
-
Boemo, E.; Lopez-Buedo, S.; Santos Perez, C.; Jauregui, J.; Meneses, J.: "Logic Depth and Power Consumption: A comparative Study Between Standard Cells and FPGAs", Proc. of the XII DCIS Conference, 1998
-
(1998)
Proc. Of The Xii Dcis Conference
-
-
Boemo, E.1
Lopez-Buedo, S.2
Santos Perez, C.3
Jauregui, J.4
Meneses, J.5
-
5
-
-
0034837919
-
A Design Environment for High-Throughput, Low Power Dedicated Signal Processing Systems
-
Davis, R.; Zhang, N.; Camera, K.; Chen, F.; Markovic, D.; Chan, N.; Nikolic, B.; Brodersen, R.:"A Design Environment for High-Throughput, Low Power Dedicated Signal Processing Systems", Proc. CICC 2001, pp.545-8
-
Proc. Cicc 2001
, pp. 545-548
-
-
Davis, R.1
Zhang, N.2
Camera, K.3
Chen, F.4
Markovic, D.5
Chan, N.6
Nikolic, B.7
Brodersen, R.8
-
6
-
-
0034174025
-
The Density Advantage of Configurable Computing
-
April
-
De Hon, A.: "The Density Advantage of Configurable Computing", IEEE Computer, April 2000, pp. 41-49
-
(2000)
Ieee Computer
, pp. 41-49
-
-
De Hon, A.1
-
7
-
-
0034579629
-
Low Power Delay Calculation for Handheld Ultrasound Beamformers
-
22.-25. October
-
Feldkämper, H.T.; Schwann, R.; Gierenz, V.; Noll, T. G.: "Low Power Delay Calculation for Handheld Ultrasound Beamformers", Proc. IEEE Ultrasonics Symposium 2000, 22.-25. October 2000, pp. 1763-6
-
(2000)
Proc. Ieee Ultrasonics Symposium 2000
, pp. 1763-1766
-
-
Feldkämper, H.T.1
Schwann, R.2
Gierenz, V.3
Noll, T.G.4
-
8
-
-
14844364643
-
Integrated Circuits for Next Generation Wireless Systems
-
Hausner, J.: "Integrated Circuits for Next Generation Wireless Systems", Proc. ESSCIRC 2001, pp. 26-29
-
Proc. Esscirc 2001
, pp. 26-29
-
-
Hausner, J.1
-
10
-
-
85013891434
-
-
Karn, P. http://people.qualcomm.com/karn/code/index.html, 1996
-
(1996)
-
-
Karn, P.1
-
11
-
-
0034853861
-
Achieving 550 MHz in an ASIC Methodology
-
Chinnery, D. G.; Nikolic, B.; Keutzer, K.: "Achieving 550 MHz in an ASIC Methodology", Proc. of the DAC, 2001, pp. 420-425
-
(2001)
Proc. Of The Dac
, pp. 420-425
-
-
Chinnery, D.G.1
Nikolic, B.2
Keutzer, K.3
-
12
-
-
0034428118
-
System-Level-Design: Orthogonalization of Concerns and Platform-Based Design
-
Dec
-
Keutzer, K.; Malik, S.; Newton, A.; Rabaey, J.; Sangiovanni-Vincentelli, A.: "System-Level-Design: Orthogonalization of Concerns and Platform-Based Design", IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 12, Dec. 2000, pp. 1523-1543
-
(2000)
Ieee Transaction On Computer-Aided Design Of Integrated Circuits And Systems
, vol.19
, Issue.12
, pp. 1523-1543
-
-
Keutzer, K.1
Malik, S.2
Newton, A.3
Rabaey, J.4
Sangiovanni-Vincentelli, A.5
-
13
-
-
0033724504
-
Parallel Viterbi algorithm for a VLIW DSP
-
Khan, S. A.; Saqib, M.; Ahmed, S.: "Parallel Viterbi algorithm for a VLIW DSP", ASSP'2000, pp. 3390-3
-
Assp'2000
, pp. 3390-3393
-
-
Khan, S.A.1
Saqib, M.2
Ahmed, S.3
-
15
-
-
0000404969
-
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems
-
Lieverse, P.; Van der Wolf, P.; Vissers, K.; Deprettere, E.: "A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems", Journal of VLSI Signal Processing, 29, 2001, pp. 197-207
-
(2001)
Journal Of Vlsi Signal Processing
, vol.29
, pp. 197-207
-
-
Lieverse, P.1
Van Der Wolf, P.2
Vissers, K.3
Deprettere, E.4
-
16
-
-
0029777661
-
An Architecture overview of the programmable multimedia processor TM 1000
-
IEEE CS Press
-
Rathnam, S.; Slavenburg, G.: "An Architecture overview of the programmable multimedia processor TM 1000", Proc. Compcon, IEEE CS Press, 1996, pp. 319-326
-
(1996)
Proc. Compcon
, pp. 319-326
-
-
Rathnam, S.1
Slavenburg, G.2
-
17
-
-
0035341885
-
Reconfigurable Computing for Digital Signal Processing: A Survey
-
Tessier, R.; Burleson, W.: "Reconfigurable Computing for Digital Signal Processing: A Survey", Journal of VLSI Signal Processing 28, 2001, pp. 7-27
-
(2001)
Journal Of Vlsi Signal Processing
, vol.28
, pp. 7-27
-
-
Tessier, R.1
Burleson, W.2
-
20
-
-
3042805764
-
A flexible Datapath Generator for Physical Oriented Design
-
Weiss, O.; Gansen, M.; Noll, T. G.: "A flexible Datapath Generator for Physical Oriented Design", Proc. ESSCIRC 2001, pp.408-11
-
Proc. Esscirc 2001
, pp. 408-411
-
-
Weiss, O.1
Gansen, M.2
Noll, T.G.3
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