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Volumn 34, Issue 8, 2013, Pages 1068-1070

Spintronic switches for ultralow energy on-chip and interchip current-mode interconnects

Author keywords

Integrated circuit interconnections; low power; magnets; spin valves

Indexed keywords

HIGH PERFORMANCE COMPUTING SYSTEMS; INTEGRATED CIRCUIT INTERCONNECTIONS; INTERCONNECT DESIGN; LATERAL SPIN VALVE; LOW POWER; MAGNETIC TUNNEL JUNCTION; SPIN VALVE; SPIN-TORQUE SWITCHING;

EID: 84881030847     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2013.2268152     Document Type: Article
Times cited : (21)

References (11)
  • 1
    • 36849063126 scopus 로고    scopus 로고
    • Research challenges for on-chip interconnection networks
    • DOI 10.1109/MM.2007.4378787
    • J. D. Owens, W. J. Dally, R. Ho, et al., "Research challenges for onchip interconnection networks," IEEE Micro, vol. 27, no. 5, pp. 96-108, Oct. 2007. (Pubitemid 350218391)
    • (2007) IEEE Micro , vol.27 , Issue.5 , pp. 96-108
    • Owens, J.D.1    Dally, W.J.2    Ho, R.3    Jayashima, D.N.4    Keckler, S.W.5    Peh, L.-S.6
  • 2
    • 84876559591 scopus 로고    scopus 로고
    • A 95fJ/b current-mode transceiver for 10mm on-chip interconnect
    • Feb
    • S. K. Lee, S. H. Lee, D. Sylvester, et al., "A 95fJ/b current-mode transceiver for 10mm on-chip interconnect," in Proc. IEEE ISSCC, Feb. 2013, pp. 262-263.
    • (2013) Proc. IEEE ISSCC , pp. 262-263
    • Lee, S.K.1    Lee, S.H.2    Sylvester, D.3
  • 4
    • 2342509650 scopus 로고    scopus 로고
    • Domain wall displacement induced by subnanosecond pulsed current
    • C. K. Lim, T. Devolder, C. Chappert, et al., "Domain wall displacement induced by subnanosecond pulsed current," Appl. Phys. Lett., vol. 84, no. 15, pp. 2820-2822, 2004.
    • (2004) Appl. Phys. Lett , vol.84 , Issue.15 , pp. 2820-2822
    • Lim, C.K.1    Devolder, T.2    Chappert, C.3
  • 5
    • 71049160813 scopus 로고    scopus 로고
    • Low-current perpendicular domain wall motion cell for scalable high-speed MRAM
    • S. Fukami, T. Suzuki, K. Nagahara, et al., "Low-current perpendicular domain wall motion cell for scalable high-speed MRAM," in Proc. VLSI Tech. Symp., 2009, pp. 230-231.
    • (2009) Proc. VLSI Tech. Symp , pp. 230-231
    • Fukami, S.1    Suzuki, T.2    Nagahara, K.3
  • 6
    • 79957474907 scopus 로고    scopus 로고
    • Fast current-induced domain-wall motion controlled by the Rashba effect
    • I. M. Miron, T. Moore, H. Szambolics, et al., "Fast current-induced domain-wall motion controlled by the Rashba effect," Nature Mater., vol. 10, no. 6, pp. 419-423, 2011.
    • (2011) Nature Mater , vol.10 , Issue.6 , pp. 419-423
    • Miron, I.M.1    Moore, T.2    Szambolics, H.3
  • 7
    • 84872259992 scopus 로고    scopus 로고
    • Matching domain-wall configuration and spin-orbit torques for efficient domain-wall motion
    • A .V. Khvalkovskiy, V. Cros, D. Apalkov, et al., "Matching domain-wall configuration and spin-orbit torques for efficient domain-wall motion," Phys. Rev. B, vol. 87, no. 2, p. 020402, 2013.
    • (2013) Phys. Rev. B , vol.87 , Issue.2 , pp. 020402
    • Khvalkovskiy, A.V.1    Cros, V.2    Apalkov, D.3
  • 8
    • 84867765110 scopus 로고    scopus 로고
    • Novel STT-MTJ device enabling all-metallic logic circuits
    • Nov.
    • D. M. Bromberg, D. H. Morris, L. Pileggi, et al., "Novel STT-MTJ device enabling all-metallic logic circuits," IEEE Trans. Magn., vol. 48, no. 11, pp. 3215-3218, Nov. 2012.
    • (2012) IEEE Trans. Magn , vol.48 , Issue.11 , pp. 3215-3218
    • Bromberg, D.M.1    Morris, D.H.2    Pileggi, L.3
  • 9
    • 84876151069 scopus 로고    scopus 로고
    • Boolean and non-Boolean computation with spin devices
    • Dec
    • M. Sharad, C. Augustine, and K. Roy, "Boolean and non-Boolean computation with spin devices," in Proc. IEEE IEDM, Dec. 2012, pp. 11-14.
    • (2012) Proc. IEEE IEDM , pp. 11-14
    • Sharad, M.1    Augustine, C.2    Roy, K.3
  • 10
    • 77950864797 scopus 로고    scopus 로고
    • Proposal for an all-spin logic device with built-in memory
    • B. Behin-Aein, D. Datta, S. Salahuddin, et al., "Proposal for an all-spin logic device with built-in memory," Nature Nanotechnol., vol. 5, no. 4, pp. 266-270, 2010.
    • (2010) Nature Nanotechnol , vol.5 , Issue.4 , pp. 266-270
    • Behin-Aein, B.1    Datta, D.2    Salahuddin, S.3
  • 11
    • 84856989729 scopus 로고    scopus 로고
    • Numerical analysis of domain wall propagation for dense memory arrays
    • Dec
    • C. Augustine, A. Raychowdhury, B. Behin-Aein, et al., "Numerical analysis of domain wall propagation for dense memory arrays," in Proc. IEEE IEDM, Dec. 2011, pp. 11-14.
    • (2011) Proc. IEEE IEDM , pp. 11-14
    • Augustine, C.1    Raychowdhury, A.2    Behin-Aein, B.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.