Redundancy

Inside NAND Flash Memories

Volumn , Issue , 2010, Pages 353-392

  Marelli, A ^a   Micheloni, R ^a  

^a Integrated Device Technology   (Italy)

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Indexed keywords

EID: 84881004528     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-90-481-9431-5_13     Document Type: Chapter

References (16)

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2. G. Campardo, R. Micheloni, D. Novosel "VLSI-Design of Non-Volatile Memories", Springer, 2005.
3. R. Micheloni, A. Marelli, R. Ravasio "Nand Flash Memory Device with ECC protected reserved area for Non-Volatile Storage of Redundancy Data", United States Patents US2008/0065937 A1, Mar. 13, 2008.
4. Koji Sakui, Kang-Deog Suh "Nand Flash Memory Technology", Wiley 2008.
5. R. Micheloni et al. "A 4Gb 2b/cell NAND Flash Memory with Embedded 5b BCH ECC for 36MB/s System Read Throughput Solid-State Circuits Conference", Digest of Technical Papers ISSCC 2006 IEEE International, Feb. 2006, pp. 497-506.
6. R. Adrian Cernea, "Nonvolatile Erasable Flash NAND Memories", SanDisk Corporation, Santa Clara Valley (SCV), IEEE Solid State Circuits Society, April 2008.
7. K. Takeuchi, T. Tanaka, T. Tanzawa "A Multipage cell Architecture for High-Sped Programming Multilevel NAND Flash memories", IEEE Journal of Solid state circuits, Vol. 33, No. 8, August 1997.
8. Lu Chih-Yuan, Lu Tao-Cheng, Liu Rich, "Non-Volatile Memory Technology-Today and Tomorrow", Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the, pp. 18-23, 3-7 July 2006.
9. P. Cappelletti, C. Golla, P. Olivo, E. Zanoni, Eds., "Flash Memories". Boston, MA: Kluwer, 1999, ch. 5.
10. P. Cappelletti, R. Bez, A. Modelli, A. Visconti, "What we have learned on Flash memory reliability in the last ten years", Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE.
11. M. Annaratone, "Digital CMOS Circuit Design". Boston, MA: Kluwer.
12. H. Arakawa, "Address Decoder Circuit for Non-Volatile Memory", United States Patents 5, 039, 882, August 13, 1991.
13. S. Aritome, "Advanced Flash Memory Technology and Trends for File Storage Application", IEDM Technical Digest, pp. 763-766, 2000.
14. S. Atsumi et al., "A 3.3V-only 16 Mb Flash Memory with Row-Decoding scheme", 1996 IEEE Int. Solid-State Circuits Conference. Digest of Technical Papers, pp. 42-43, February 1996.
15. R. Bez et al., "Introduction to Flash Memory", Proceedings of the IEEE, vol. 91, pp. 554-568, 2003.
16. G. Campardo et al., "An overview of Flash Architectural Developments", IEEE Proceedings of the, vol. 91, No. 4, pp. 523-536, April 2003.