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Volumn 60, Issue 12, 2013, Pages 5925-5932

Efficient fault diagnosis schemes for reliable lightweight cryptographic ISO/IEC standard CLEFIA benchmarked on ASIC and FPGA

Author keywords

Application specific integrated circuit (ASIC); CLEFIA symmetric key block cipher; efficient error detection; field programmable gate array (FPGA); reliability

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DATA PRIVACY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUITS; RELIABILITY;

EID: 84880077462     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2012.2228144     Document Type: Article
Times cited : (34)

References (40)
  • 1
    • 80052854156 scopus 로고    scopus 로고
    • Securing the internet of things
    • Sep.
    • 1] R. Roman, P. Najera, and J. Lopez, "Securing the Internet of Things," Computer, vol. 44, no. 9, pp. 51-58, Sep. 2011.
    • (2011) Computer , vol.44 , Issue.9 , pp. 51-58
    • Roman, R.1    Najera, P.2    Lopez, J.3
  • 2
    • 84868112157 scopus 로고    scopus 로고
    • EAACK-A secure intrusion detection system for MANETs
    • Mar.
    • E. M. Shakshuki, N. Kang, and T. R. Sheltami, "EAACK-A secure intrusion detection system for MANETs," IEEE Trans. Ind. Electron., vol. 60, no. 3, pp. 1089-1098, Mar. 2013.
    • (2013) IEEE Trans. Ind. Electron. , vol.60 , Issue.3 , pp. 1089-1098
    • Shakshuki, E.M.1    Kang, N.2    Sheltami, T.R.3
  • 3
    • 84965066515 scopus 로고    scopus 로고
    • Announcing the Advanced Encryption Standard (AES)
    • National Institute of Standards and Technologies Nov.
    • National Institute of Standards and Technologies, "Announcing the Advanced Encryption Standard (AES)," Federal Information Processing Standards Publication, no. 197, Nov. 2001.
    • (2001) Federal Information Processing Standards Publication , Issue.197
  • 5
    • 84880073443 scopus 로고    scopus 로고
    • accessed in November 2012. [Online]. Available
    • CLEFIA Standardization in ISO/IEC 29192-2, accessed in November 2012. [Online]. Available: http://www.sony.net/Products/cryptography/clefia/standard/ iso.html
    • CLEFIA Standardization in ISO/IEC 29192-2
  • 6
    • 80053485119 scopus 로고    scopus 로고
    • Very compact hardware implementations of the blockcipher CLEFIA
    • Aug.
    • T. Akishita and H. Hiwatari, "Very compact hardware implementations of the blockcipher CLEFIA," in Proc. SAC, Aug. 2011, pp. 278-292.
    • (2011) Proc. SAC , pp. 278-292
    • Akishita, T.1    Hiwatari, H.2
  • 8
    • 84864035089 scopus 로고    scopus 로고
    • Zero-correlation linear cryptanalysis of block ciphers
    • A. Bogdanov and V. Rijmen, "Zero-correlation linear cryptanalysis of block ciphers," in Proc. IACR Cryptol. ePrint, 2011, p. 123.
    • (2011) Proc. IACR Cryptol. EPrint , pp. 123
    • Bogdanov, A.1    Rijmen, V.2
  • 9
    • 79956208535 scopus 로고    scopus 로고
    • Impossible differential cryptanalysis of 13-round CLEFIA-128
    • Jul.
    • X. Tang, B. Sun, R. Li, and C. Li, "Impossible differential cryptanalysis of 13-round CLEFIA-128," J. Syst. Softw., vol. 84, no. 7, pp. 1191-1196, Jul. 2011.
    • (2011) J. Syst. Softw. , vol.84 , Issue.7 , pp. 1191-1196
    • Tang, X.1    Sun, B.2    Li, R.3    Li, C.4
  • 10
    • 79952639210 scopus 로고    scopus 로고
    • Fault detection and mitigation in multilevel converter STATCOMs
    • Apr.
    • A. Yazdani, H. Sepahvand, M. Crow, and M. Ferdowsi, "Fault detection and mitigation in multilevel converter STATCOMs," IEEE Trans. Ind. Electron., vol. 58, no. 4, pp. 1307-1315, Apr. 2011.
    • (2011) IEEE Trans. Ind. Electron. , vol.58 , Issue.4 , pp. 1307-1315
    • Yazdani, A.1    Sepahvand, H.2    Crow, M.3    Ferdowsi, M.4
  • 12
    • 79954458303 scopus 로고    scopus 로고
    • Detection and isolation of speed-, dc-link voltage-, and current-sensor faults based on an adaptive observer in induction-motor drives
    • May
    • T. A. Najafabadi, F. R. Salmasi, and P. Jabehdar-Maralani, "Detection and isolation of speed-, dc-link voltage-, and current-sensor faults based on an adaptive observer in induction-motor drives," IEEE Trans. Ind. Electron., vol. 58, no. 5, pp. 1662-1672, May 2011.
    • (2011) IEEE Trans. Ind. Electron. , vol.58 , Issue.5 , pp. 1662-1672
    • Najafabadi, T.A.1    Salmasi, F.R.2    Jabehdar-Maralani, P.3
  • 13
    • 79954488114 scopus 로고    scopus 로고
    • Analysis and diagnosis of open-circuit faults in matrix converters
    • May
    • S. Cruz, M. Ferreira, A. Mendes, and A. J. M. Cardoso, "Analysis and diagnosis of open-circuit faults in matrix converters," IEEE Trans. Ind. Electron., vol. 58, no. 5, pp. 1648-1661, May 2011.
    • (2011) IEEE Trans. Ind. Electron. , vol.58 , Issue.5 , pp. 1648-1661
    • Cruz, S.1    Ferreira, M.2    Mendes, A.3    Cardoso, A.J.M.4
  • 14
    • 38149107487 scopus 로고    scopus 로고
    • Differential fault analysis on CLEFIA
    • Dec.
    • H. Chen, W. Wu, and D. Feng, "Differential fault analysis on CLEFIA," in Proc. LNCS ICICS, Dec. 2007, pp. 284-295.
    • (2007) Proc. LNCS ICICS , pp. 284-295
    • Chen, H.1    Wu, W.2    Feng, D.3
  • 15
    • 52949142294 scopus 로고    scopus 로고
    • Improved differential fault analysis on CLEFIA
    • Aug.
    • J. Takahashi and T. Fukunaga, "Improved differential fault analysis on CLEFIA," in Proc. LNCS FDTC, Aug. 2008, pp. 25-34.
    • (2008) Proc. LNCS FDTC , pp. 25-34
    • Takahashi, J.1    Fukunaga, T.2
  • 16
    • 77950648643 scopus 로고    scopus 로고
    • Differential fault analysis on CLEFIA with 128, 192, and 256-bit keys
    • Jan.
    • J. Takahashi and T. Fukunaga, "Differential fault analysis on CLEFIA with 128, 192, and 256-bit keys," IEICE Trans. Fundam. Electron., Commun. Comput. Sci., vol. E93.A, no. 1, pp. 136-143, Jan. 2010.
    • (2010) IEICE Trans. Fundam. Electron., Commun. Comput. Sci. , vol.E93.A , Issue.1 , pp. 136-143
    • Takahashi, J.1    Fukunaga, T.2
  • 17
    • 84880074533 scopus 로고    scopus 로고
    • Protecting last four rounds of CLEFIA is not enough against differential fault analysis
    • May
    • S. Ali and D. Mukhopadhyay, "Protecting last four rounds of CLEFIA is not enough against differential fault analysis," in Proc. IACR Cryptol. ePrint, May 2012, p. 286.
    • (2012) Proc. IACR Cryptol. EPrint , pp. 286
    • Ali, S.1    Mukhopadhyay, D.2
  • 18
    • 71049171341 scopus 로고    scopus 로고
    • Differential fault analysis on the AES key schedule
    • ePrint Dec.
    • J. Takahashi and T. Fukunaga, "Differential fault analysis on the AES key schedule," in Proc. IACR Cryptol. ePrint, Dec. 2007, p. 480.
    • (2007) Proc. IACR Cryptol , pp. 480
    • Takahashi, J.1    Fukunaga, T.2
  • 19
    • 79959296407 scopus 로고    scopus 로고
    • Modular multiplication and exponentiation architectures for fast RSA cryptosystem based on digit serial computation
    • Jul.
    • G. Sutter, J. P. Deschamps, and J. Imaña, "Modular multiplication and exponentiation architectures for fast RSA cryptosystem based on digit serial computation," IEEE Trans. Ind. Electron., vol. 58, no. 7, pp. 3101-3109, Jul. 2011.
    • (2011) IEEE Trans. Ind. Electron. , vol.58 , Issue.7 , pp. 3101-3109
    • Sutter, G.1    Deschamps, J.P.2    Imaña, J.3
  • 20
    • 84866299580 scopus 로고    scopus 로고
    • Efficient elliptic curve point multiplication using digit serial binary field operations
    • Jan.
    • G. Sutter, J. P. Deschamps, and J. Imaña, "Efficient elliptic curve point multiplication using digit serial binary field operations," IEEE Trans. Ind. Electron., vol. 60, no. 1, pp. 217-225, Jan. 2013.
    • (2013) IEEE Trans. Ind. Electron. , vol.60 , Issue.1 , pp. 217-225
    • Sutter, G.1    Deschamps, J.P.2    Imaña, J.3
  • 21
    • 84862674687 scopus 로고    scopus 로고
    • Efficient FPGA implementations of point multiplication on binary Edwards and generalized Hessian curves using Gaussian normal basis
    • R. Azarderakhsh and A. Reyhani-Masoleh, "Efficient FPGA implementations of point multiplication on binary Edwards and generalized Hessian curves using Gaussian normal basis," IEEE Trans. VLSI Syst., vol. 20, no. 8, pp. 1453-1466, 2012.
    • (2012) IEEE Trans. VLSI Syst. , vol.20 , Issue.8 , pp. 1453-1466
    • Azarderakhsh, R.1    Reyhani-Masoleh, A.2
  • 22
    • 33646472890 scopus 로고    scopus 로고
    • Simple error detection methods for hardware implementation of advanced encryption standard
    • Jun.
    • C. H. Yen and B. F. Wu, "Simple error detection methods for hardware implementation of advanced encryption standard," IEEE Trans. Comput., vol. 55, no. 6, pp. 720-731, Jun. 2006.
    • (2006) IEEE Trans. Comput. , vol.55 , Issue.6 , pp. 720-731
    • Yen, C.H.1    Wu, B.F.2
  • 23
    • 77950321652 scopus 로고    scopus 로고
    • An operation-centered approach to fault detection in symmetric cryptography ciphers
    • May
    • L. Breveglieri, I. Koren, and P. Maistri, "An operation-centered approach to fault detection in symmetric cryptography ciphers," IEEE Trans. Comput., vol. 56, no. 5, pp. 635-649, May 2007.
    • (2007) IEEE Trans. Comput. , vol.56 , Issue.5 , pp. 635-649
    • Breveglieri, L.1    Koren, I.2    Maistri, P.3
  • 24
    • 54049134826 scopus 로고    scopus 로고
    • Double-data-rate computation as a countermeasure against fault analysis
    • Nov.
    • P. Maistri and R. Leveugle, "Double-data-rate computation as a countermeasure against fault analysis," IEEE Trans. Comput., vol. 57, no. 11, pp. 1528-1539, Nov. 2008.
    • (2008) IEEE Trans. Comput. , vol.57 , Issue.11 , pp. 1528-1539
    • Maistri, P.1    Leveugle, R.2
  • 25
    • 77950310791 scopus 로고    scopus 로고
    • Concurrent structureindependent fault detection schemes for the advanced encryption standard
    • May
    • M. Mozaffari-Kermani and A. Reyhani-Masoleh, "Concurrent structureindependent fault detection schemes for the advanced encryption standard," IEEE Trans. Comput., vol. 59, no. 5, pp. 608-622, May 2010.
    • (2010) IEEE Trans. Comput. , vol.59 , Issue.5 , pp. 608-622
    • Mozaffari-Kermani, M.1    Reyhani-Masoleh, A.2
  • 26
    • 79961057099 scopus 로고    scopus 로고
    • A low-power highperformance concurrent fault detection approach for the composite field S-box and inverse S-box
    • Sep.
    • M. Mozaffari-Kermani and A. Reyhani-Masoleh, "A low-power highperformance concurrent fault detection approach for the composite field S-box and inverse S-box," IEEE Trans. Comput., vol. 60, no. 9, pp. 1327-1340, Sep. 2011.
    • (2011) IEEE Trans. Comput. , vol.60 , Issue.9 , pp. 1327-1340
    • Mozaffari-Kermani, M.1    Reyhani-Masoleh, A.2
  • 27
    • 84863545438 scopus 로고    scopus 로고
    • Invariance-based concurrent error detection for advanced encryption standard
    • Jun.
    • R. Karri and X. Guo, "Invariance-based concurrent error detection for advanced encryption standard," in Proc. DAC, Jun. 2012, pp. 573-578.
    • (2012) Proc. DAC , pp. 573-578
    • Karri, R.1    Guo, X.2
  • 28
    • 84880070100 scopus 로고    scopus 로고
    • [Online]. Available
    • TSMC. [Online]. Available: http://www.tsmc.com/
  • 29
    • 84880075656 scopus 로고    scopus 로고
    • [Online]. Available
    • Xilinx. [Online]. Available: http://www.xilinx.com/
  • 31
    • 33747653029 scopus 로고    scopus 로고
    • Fault detection architectures for field multiplication using polynomial bases
    • DOI 10.1109/TC.2006.147
    • A. Reyhani-Masoleh and M. A. Hasan, "Fault detection architectures for field multiplication using polynomial bases," IEEE Trans. Comput.-Special Issue Fault Diagnosis Tolerance Cryptogr., vol. 55, no. 9, pp. 1089-1103, Sep. 2006. (Pubitemid 44268876)
    • (2006) IEEE Transactions on Computers , vol.55 , Issue.9 , pp. 1089-1103
    • Reyhani-Masoleh, A.1    Hasan, M.A.2
  • 32
    • 77955173953 scopus 로고    scopus 로고
    • Concurrent error detection in bit-serial normal basis multiplication over GF(2m) using multiple parity prediction schemes
    • Aug.
    • C.-Y. Lee, P. K. Meher, and J. C. Patra, "Concurrent error detection in bit-serial normal basis multiplication over GF(2m) using multiple parity prediction schemes," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 18, no. 8, pp. 1234-1238, Aug. 2010.
    • (2010) IEEE Trans. Very Large Scale Integr. (VLSI) Syst. , vol.18 , Issue.8 , pp. 1234-1238
    • Lee, C.-Y.1    Meher, P.K.2    Patra, J.C.3
  • 33
    • 33746081664 scopus 로고    scopus 로고
    • Very small FPGA application-specific instruction processor for AES
    • DOI 10.1109/TCSI.2006.875179
    • T. Good andM. Benaissa, "Very small FPGA application-specific instruction processor for AES," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 7, pp. 1477-1486, Jul. 2006. (Pubitemid 44070161)
    • (2006) IEEE Transactions on Circuits and Systems I: Regular Papers , vol.53 , Issue.7 , pp. 1477-1486
    • Good, T.1    Benaissa, M.2
  • 34
    • 33750594400 scopus 로고    scopus 로고
    • On the optimum constructions of composite field for the AES algorithm
    • DOI 10.1109/TCSII.2006.882217
    • X. Zhang and K. K. Parhi, "On the optimum constructions of composite field for the AES algorithm," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 53, no. 10, pp. 1153-1157, Oct. 2006. (Pubitemid 44680640)
    • (2006) IEEE Transactions on Circuits and Systems II: Express Briefs , vol.53 , Issue.10 , pp. 1153-1157
    • Zhang, X.1    Parhi, K.K.2
  • 35
    • 84880078698 scopus 로고    scopus 로고
    • [Online]. Available
    • Synopsys. [Online]. Available: http://www.synopsys.com/
  • 37
    • 77956575314 scopus 로고    scopus 로고
    • Course on digital electronics oriented to describing systems in VHDL
    • Oct.
    • F. J. Azcondo, A. de Castro, and C. Branas, "Course on digital electronics oriented to describing systems in VHDL," IEEE Trans. Ind. Electron., vol. 57, no. 10, pp. 3308-3316, Oct. 2010.
    • (2010) IEEE Trans. Ind. Electron. , vol.57 , Issue.10 , pp. 3308-3316
    • Azcondo, F.J.1    De Castro, A.2    Branas, C.3
  • 38
    • 34547133729 scopus 로고    scopus 로고
    • FPGA design methodology for industrial control systems - A review
    • DOI 10.1109/TIE.2007.898281
    • E. Monmasson and M. N. Cirstea, "FPGA design methodology for industrial control systems-A review," IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 1824-1842, Aug. 2007. (Pubitemid 47097232)
    • (2007) IEEE Transactions on Industrial Electronics , vol.54 , Issue.4 , pp. 1824-1842
    • Monmasson, E.1    Cirstea, M.N.2
  • 39
    • 70349623905 scopus 로고    scopus 로고
    • Selecting profitable custom instructions for area-time-efficient realization on reconfigurable architectures
    • Oct.
    • S.-K. Lam, T. Srikanthan, and C. Clarke, "Selecting profitable custom instructions for area-time-efficient realization on reconfigurable architectures," IEEE Trans. Ind. Electron., vol. 56, no. 10, pp. 3998-4005, Oct. 2009.
    • (2009) IEEE Trans. Ind. Electron. , vol.56 , Issue.10 , pp. 3998-4005
    • Lam, S.-K.1    Srikanthan, T.2    Clarke, C.3
  • 40
    • 84876280152 scopus 로고    scopus 로고
    • FPGA-based reconfigurable control for fault-tolerant back-to-back converter without redundancy
    • Aug.
    • M. Shahbazi, P. Poure, S. Saadate, and M. Zolghadri, "FPGA-based reconfigurable control for fault-tolerant back-to-back converter without redundancy," IEEE Trans. Ind. Electron., vol. 60, no. 8, pp. 3360-3371, Aug. 2013.
    • (2013) IEEE Trans. Ind. Electron. , vol.60 , Issue.8 , pp. 3360-3371
    • Shahbazi, M.1    Poure, P.2    Saadate, S.3    Zolghadri, M.4


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