Fault detection architectures for field multiplication using polynomial bases

IEEE Transactions on Computers

Volumn 55, Issue 9, 2006, Pages 1089-1103

  Reyhani Masoleh, Arash ^a   Hasan, M Anwar ^b  

^a UNIVERSITY OF WESTERN ONTARIO   (Canada)

^b UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Error detection; Finite fields; Polynomial basis multiplier

Indexed keywords

COMPUTER ARCHITECTURE; ERROR DETECTION; LOGIC GATES; POLYNOMIALS;

FAULT DETECTION ARCHITECTURES; FINITE FIELD MULTIPLICATION; PARITY PREDICTION; POLYNOMIAL BASIS MULTIPLIER;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 33747653029     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2006.147     Document Type: Article

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