Contrasting wavelength-routed optical NoC topologies for power-efficient 3d-stacked multicore processors using physical-layer analysis

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2013, Pages 1589-1594

  Ramini, Luca ^a   Grani, Paolo ^b   Bartolini, Sandro ^b   Bertozzi, Davide ^a  

^a UNIVERSITY OF FERRARA   (Italy)

^b UNIVERSITY OF SIENA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EFFICIENCY; NETWORK LAYERS; THREE DIMENSIONAL INTEGRATED CIRCUITS; TOPOLOGY;

ANALYSIS FRAMEWORKS; MULTI-CORE PROCESSOR; OPTICAL NETWORKS ON CHIPS; PHYSICAL LAYERS; POWER EFFICIENCY; POWER EFFICIENT; TOPOLOGY LAYOUT; WAVELENGTH ROUTED;

NETWORK-ON-CHIP;

EID: 84878791208     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2013.323     Document Type: Conference Paper

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