-
1
-
-
79957521124
-
Sleep-aware mode assignment in wireless embedded systems
-
Jul.
-
Z. Yuan, Y. Zhang, and C. J. Xue, "Sleep-aware mode assignment in wireless embedded systems," J. Parallel Distrib. Comput., vol. 71, no. 7, pp. 1002-1010, Jul. 2011.
-
(2011)
J. Parallel Distrib. Comput
, vol.71
, Issue.7
, pp. 1002-1010
-
-
Yuan, Z.1
Zhang, Y.2
Xue, C.J.3
-
2
-
-
84876240031
-
-
Available
-
A. Kansal, J. Hsu, S. Zahedi, and M. B. Srivastava. Oak Ridge National Laboratory RSR, Oak Ridge, TN, USA [Online]. Available: http://www.nrel.gov/ midc/ornl-rsr/
-
Oak Ridge National Laboratory RSR Oak Ridge TN USA [Online]
-
-
Kansal, A.1
Hsu, J.2
Zahedi, S.3
Srivastava, M.B.4
-
3
-
-
85016294846
-
Power management in energy harvesting sensor networks
-
Sep
-
A. Kansal, J. Hsu, S. Zahedi, and M. B. Srivastava, "Power management in energy harvesting sensor networks," ACM Trans. Embedded Comput. Syst., vol. 6, no. 4, pp. 1-35, Sep. 2007.
-
(2007)
ACM Trans. Embedded Comput. Syst
, vol.6
, Issue.4
, pp. 1-35
-
-
Kansal, A.1
Hsu, J.2
Zahedi, S.3
Srivastava, M.B.4
-
4
-
-
33646950065
-
Perpetual environmentally powered sensor networks
-
DOI 10.1109/IPSN.2005.1440974, 1440974, 2005 Fourth International Symposium on Information Processing in Sensor Networks, IPSN 2005
-
X. Jiang, J. Polastre, and D. Culler, "Perpetual environmentally powered sensor networks," in Proc. Sensor. Netw. Int. Symp., Apr. 2005, pp. 463-468. (Pubitemid 43841271)
-
(2005)
2005 4th International Symposium on Information Processing in Sensor Networks, IPSN 2005
, vol.2005
, pp. 463-468
-
-
Jiang, X.1
Polastre, J.2
Culler, D.3
-
5
-
-
17044365390
-
Energy scavenging for mobile and wireless electronics
-
DOI 10.1109/MPRV.2005.9
-
J. A. Paradiso and T. Starner, "Energy scavenging for mobile and wireless electronics," IEEE Pervas. Comput., vol. 4, no. 1, pp. 18-27, Jan. 2005. (Pubitemid 40495602)
-
(2005)
IEEE Pervasive Computing
, vol.4
, Issue.1
, pp. 18-27
-
-
Paradiso, J.A.1
Starner, T.2
-
6
-
-
77953826834
-
Wireless sensor network node with asynchronous architecture and vibration harvesting micro power generator
-
Y. Ammar, A. Buhrig, M. Marzencki, B. Charlot, S. Basrour, and M. Renaudin, "Wireless sensor network node with asynchronous architecture and vibration harvesting micro power generator," in Proc. Joint Conf. Smart Objects Ambient Intell. Innov. Context-Aware Services, Usages Technol., 2005, pp. 287-292.
-
(2005)
Proc. Joint Conf. Smart Objects Ambient Intell. Innov. Context-Aware Services, Usages Technol
, pp. 287-292
-
-
Ammar, Y.1
Buhrig, A.2
Marzencki, M.3
Charlot, B.4
Basrour, S.5
Renaudin, M.6
-
7
-
-
84876204463
-
-
[Online] Available
-
HelioMote Project. (2009) [Online]. Available: http://research.cens.ucla. edu/portal/page?id=56,55124,56-55125&-dad=portal&-schema=PORTAL
-
(2009)
HelioMote Project
-
-
-
9
-
-
84884690260
-
Multiversion scheduling in rechargeable energy-aware real-time systems
-
Jul
-
C. Rusu, R. Melhem, and D. Mossé, "Multiversion scheduling in rechargeable energy-aware real-time systems," in Proc. 15th Euromicro Conf. Real-Time Syst., Jul. 2003, pp. 95-104.
-
(2003)
Proc. 15th Euromicro Conf. Real-Time Syst
, pp. 95-104
-
-
Rusu, C.1
Melhem, R.2
Mossé, D.3
-
10
-
-
33845583096
-
Design concepts for a dynamically reconfigurable wireless sensor node
-
DOI 10.1109/AHS.2006.30, 1638197, Proceedings - First NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2006
-
H. Hinkelmann, P. Zipf, and M. Glesner, "Design concepts fora dynamically reconfigurable wireless sensor node," in Proc. Adapt. Hardw. Syst. First Nat. Aeronautics Space Admin. Eur. Space Agency Conf., Jun. 2006, pp. 436-441. (Pubitemid 44930835)
-
(2006)
Proceedings - First NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2006
, vol.2006
, pp. 436-441
-
-
Hinkelmann, H.1
Zipf, P.2
Glesner, M.3
-
11
-
-
38549119863
-
Reconfiguration strategies for environmentally powered devices: Theoretical analysis and experimental validation
-
DOI 10.1007/978-3-540-71528-3-21, Transactions on High-Performance Embedded Architectures and Compilers I
-
A. E. ̧Su̧su, M. Magno, A. Acquaviva, and D. Atienza, "Reconfiguration strategies for environmentally powered devices: Theoretical analysis and experimental validation," in Transactions on High-Performance Embedded Architectures and Compilers I, Per Stenstrom, Ed. New York, NY, USA: Springer-Verlag, 2007, pp. 341-360. (Pubitemid 351151601)
-
(2007)
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
, vol.4050
, Issue.LNCS
, pp. 341-360
-
-
Susu, A.E.1
Magno, M.2
Acquaviva, A.3
Atienza, D.4
De Micheli, G.5
-
12
-
-
0034848809
-
Reconfigurable platform design for wireless protocol processors
-
T. Tuan, S. F. Li, and J. Rabaey, "Reconfigurable platform design for wireless protocol processors," in Proc. IEEE Int. Conf. Acoust. Speech, Signal Process., May 2001, pp. 893-896. (Pubitemid 32839063)
-
(2001)
ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
, vol.2
, pp. 893-896
-
-
Tuan, T.1
Li, S.-F.2
Rabaey, J.3
-
13
-
-
79952847670
-
Adaptable security in wireless sensor networks by using reconfigurable ECC hardware coprocessors
-
Oct
-
J. Portilla, A. Otero, E. de la Torre, T. Riesgo, O. Stecklina, S. Peter, and P. Langendörfer, "Adaptable security in wireless sensor networks by using reconfigurable ECC hardware coprocessors," Int. J. Distrib. Sensor Netw., vol. 2010, pp. 740823-1-740823-12, Oct. 2010.
-
(2010)
Int. J. Distrib. Sensor Netw
, vol.2010
, pp. 7408231-74082312
-
-
Portilla, J.1
Otero, A.2
De La Torre, E.3
Riesgo, T.4
Stecklina, O.5
Peter, S.6
Langendörfer, P.7
-
14
-
-
39649110473
-
Dynamic and partial FPGA exploitation
-
Feb
-
J. Becker, M. Hubner, G. Hettich, R. Constapel, J. Eisenmann, and J. Luka, "Dynamic and partial FPGA exploitation," IEEE Proc., vol. 92, no. 2, pp. 438-452, Feb. 2007.
-
(2007)
IEEE Proc.
, vol.92
, Issue.2
, pp. 438-452
-
-
Becker, J.1
Hubner, M.2
Hettich, G.3
Constapel, R.4
Eisenmann, J.5
Luka, J.6
-
15
-
-
34548072006
-
Run-time integration of reconfigurable video processing systems
-
DOI 10.1109/TVLSI.2007.902203
-
P. Sedcole, Y. K. Peter, C. George, A. Constantinides, and W. Luk, "Run-time integration of reconfigurable video processing systems," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 15, no. 9, pp. 1003-1016, Sep. 2007. (Pubitemid 47295153)
-
(2007)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
, vol.15
, Issue.9
, pp. 1003-1016
-
-
Sedecole, P.1
Cheung, P.Y.K.2
Constantinides, G.A.3
Luk, W.4
-
16
-
-
54949088306
-
Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor
-
Sep
-
I. Zaidi, A. Nabina, C. N. Canagarajah, and J. Nunez-Yanez, "Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor," in Proc. Int. Conf. Field Program. Logic Appl., Sep. 2008, pp. 547-550.
-
(2008)
Proc. Int. Conf. Field Program. Logic Appl
, pp. 547-550
-
-
Zaidi, I.1
Nabina, A.2
Canagarajah, C.N.3
Nunez-Yanez, J.4
-
17
-
-
79960997045
-
Embedded runtime reconfigurable nodes for wireless sensor networks applications
-
Sep.
-
Y. E. Krasteva, J. Portilla, E. Torre, and T. Riesgo, "Embedded runtime reconfigurable nodes for wireless sensor networks applications," IEEE Sensors, vol. 11, no. 9, pp. 1800-1810, Sep. 2011.
-
(2011)
IEEE Sensors
, vol.11
, Issue.9
, pp. 1800-1810
-
-
Krasteva, Y.E.1
Portilla, J.2
Torre, E.3
Riesgo, T.4
-
18
-
-
34247366860
-
An opportunistic reconfiguration strategy for environmentally powered devices
-
DOI 10.1145/1128022.1128046, Proceedings of the 3rd Conference on Computing Frontiers 2006, CF '06
-
I. Folcarelli, A. Susu, T. Kluter, G. De Micheli, and A. Acquaviva, "An opportunistic reconfiguration strategy for environmentally powered devices," in Proc. 3rd Conf. Comput. Frontiers, 2006, pp. 171-176. (Pubitemid 46644683)
-
(2006)
Proceedings of the 3rd Conference on Computing Frontiers 2006, CF '06
, vol.2006
, pp. 171-176
-
-
Folcarelli, I.1
Susu, A.2
Kluter, T.3
De Micheli, G.4
Acquaviva, A.5
-
19
-
-
70449436492
-
An approximation algorithm for scheduling on heterogeneous reconfigurable resources
-
Oct
-
A. Nahapetian, P. Brisk, S. Ghiasi, and M. Sarrafzadeh, "An approximation algorithm for scheduling on heterogeneous reconfigurable resources," ACM Trans. Embedded Comput., vol. 9, no. 1, pp. 100-120, Oct. 2009.
-
(2009)
ACM Trans. Embedded Comput
, vol.9
, Issue.1
, pp. 100-120
-
-
Nahapetian, A.1
Brisk, P.2
Ghiasi, S.3
Sarrafzadeh, M.4
-
20
-
-
33749061304
-
SenseBench: Toward an accurate evaluation of sensor network processors
-
DOI 10.1109/IISWC.2005.1526017, 1526017, Proceedings of the 2005 IEEE International Symposium on Workload Characterization, IISWC-2005
-
L. Nazhandali, M. Minuth, and T. Austin, "SenseBench: Toward an accurate evaluation of sensor network processors," in Proc. IEEE Int. Workload Characterizat. Symp., Austin, TX, USA, Oct. 2005, pp. 197-203. (Pubitemid 44460151)
-
(2005)
Proceedings of the 2005 IEEE International Symposium on Workload Characterization, IISWC-2005
, vol.2005
, pp. 197-203
-
-
Nazhandali, L.1
Minuth, M.2
Austin, T.3
-
21
-
-
47649096627
-
Exploring the processor and ISA design for wireless sensor network applications
-
Jan
-
S. Mysore, B. Agrawal, F. Chong, and T. Sherwood, "Exploring the processor and ISA design for wireless sensor network applications," in Proc. Int. Conf. VLSI Design, Jan. 2008, pp. 59-64.
-
(2008)
Proc. Int. Conf. VLSI Design
, pp. 59-64
-
-
Mysore, S.1
Agrawal, B.2
Chong, F.3
Sherwood, T.4
-
22
-
-
33646431967
-
Modular dynamic reconfiguration in Virtex FPGAs
-
May
-
P. Sedcole, B. Blodget, T. Becker, J. Anderson, and P. Lysaght, "Modular dynamic reconfiguration in Virtex FPGAs," Proc. IEEE Comput. Digit. Tech., vol. 153, no. 3, pp. 157-164, May 2006.
-
(2006)
Proc. IEEE Comput. Digit. Tech
, vol.153
, Issue.3
, pp. 157-164
-
-
Sedcole, P.1
Blodget, B.2
Becker, T.3
Anderson, J.4
Lysaght, P.5
-
23
-
-
84866916574
-
Hardware reconfigurable wireless sensor network node with power and area efficiency
-
Sep.
-
Y. Li, Z. Jia, F. Liu, and S. Xie, "Hardware reconfigurable wireless sensor network node with power and area efficiency," IET Wireless Sensor Syst., vol. 2, no. 3, pp. 247-252, Sep. 2012.
-
(2012)
IET Wireless Sensor Syst
, vol.2
, Issue.3
, pp. 247-252
-
-
Li, Y.1
Jia, Z.2
Liu, F.3
Xie, S.4
-
24
-
-
84947928278
-
Automated Method to Generate Bitstream Intellectual Property Cores for Virtex FPGAs
-
Field-Programmable Logic and Applications
-
E. L. Horta and J. W. Lockwood, "Automated method to generate bitstream intellectual property cores for Virtex FPGAs," in Proc. Field-Program. Logic Appl., Aug. 2004, pp. 975-979. (Pubitemid 39210584)
-
(2004)
Lecture Notes in Computer Science
, Issue.3203
, pp. 975-979
-
-
Horta, E.L.1
Lockwood, J.W.2
|