Dv/Dt-control methods for the SiC JFET/Si MOSFET cascode

IEEE Transactions on Power Electronics

Volumn 28, Issue 8, 2013, Pages 4074-4082

  Aggeler, Daniel ^a,b   Canales, Francisco ^b   Biela, Juergen ^a   Kolar, Johann W ^a  

^a ETH ZURICH   (Switzerland)

^b ABB CORPORATE RESEARCH   (Switzerland)

Author keywords

dv dt control methods; SiC JFET; SiC Si cascode

Indexed keywords

BEARING CURRENTS; CASCODE; CONDUCTION LOSS; CONTROL METHODS; CONVERTER SYSTEM; DRIVE SYSTEMS; JUNCTION TEMPERATURES; MEASUREMENT RESULTS; MOS-FET; NORMALLY OFF; OPERATING FREQUENCY; PARASITIC CAPACITANCE; SIC DEVICES; SWITCHING DEVICES;

CAPACITANCE; ELECTROMAGNETIC COMPATIBILITY; ELECTROMAGNETIC PULSE; MOSFET DEVICES;

SILICON CARBIDE;

EID: 84872863520     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2012.2230536     Document Type: Article

References (22)

1. 3 resonant DC-DC converter for telecom applications," IEEE Trans. Power Electron., vol. 24, no. 7, pp. 1701-1710, Jul. 2009.
2. J. W. Kolar and H. Ertl, "Status of the techniques of three-phase rectifier systems with low effects on the mains," presented at the 21st Int. Telecommun. Energy Conf., Copenhagen, Denmark, Jun. 1999.
3. S. D. Round, P. Karutz, M. L. Heldwein, and J. W. Kolar, "Towards a 30 kW/liter, three-phase unity power factor rectifier," in Proc. Power Convers. Conf., Apr. 2007, pp. 1251-1259. (Pubitemid 47468668)
4. P. Friedrichs, "Silicon carbide power devices-Status and upcoming challenges," in Proc. Eur. Conf. Power Electron. Appl., Sep. 2007, pp. 1-11.
5. M. Shur, S. Rumyantsev, and M. Levinshtein, SiC Materials and Devices-Volume 2 (Selected Topics in Electronics and Systems). Singapore: World Scientific, 2007, vol. 43.
6. M. L. Heldwein and J. W. Kolar, "A novel SiC J-FET gate drive circuit for sparse matrix converter applications," in Proc. 19th Annu. IEEE Appl. Power Electron. Conf. Expo., Feb. 2004, vol. 1, pp. 116-121.
7. A. Orellana and B. Piepenbreier, "Fast gate drive for SiC-JFET using a conventional driver for MOSFETs and additional protections," in Proc. 30th Annu. Conf. IEEE Ind. Electron. Soc., Nov. 2004, vol. 1, pp. 938-943. (Pubitemid 40845934)
8. R. Kelley and M. S. Mazzola, "SiC JFET gate driver design for use in DC/DC converters," presented at the 21st Annu. IEEE Applied Power Electronics Conf. Expoosition, Dallas, TX, Mar. 2006.
9. S. Round, M. Heldwein, J. Kolar, I. Hofsajer, and P. Friedrichs, "A SiC JFET driver for a 5 kW, 150 kHz three-phase PWM converter," in Proc. 14th IAS Annu. Meet. Ind. Appl. Conf., Oct. 2005, vol. 1, pp. 410-416. (Pubitemid 44042481)
10. R. Kelley, F. Rees, and D. Schwob, "Optimized gate driver for enhancement-mode SiC JFET," in Proc. Int. Conf. Power Electron. Intell. Motion Power Quality, 2009.
11. L. Yang and W. G. H. Odendaal, "Measurement-based method to characterize parasitic parameters of the integrated power electronics modules," IEEE Trans. Power Electron., vol. 22, no. 1, pp. 54-62, Jan. 2007. (Pubitemid 46231757)
12. M. Moreau, N. Idir, P. Le Moigne, and J. J. Franchaud, "Utilization of a behavioural model of motor drive systems to predict the conducted emissions," in Proc. IEEE Power Electron. Spec. Conf., Jun. 2008, pp. 4387-4391.
13. J. D. Kagerbauer and T. M. Jahns, "Development of anactive dv/dt control algorithm for reducing inverter conducted EMI with minimal impact on switching losses," in Proc. IEEE Power Electron. Spec. Conf., Jun. 2007, pp. 894-900.
14. P. Lefranc and D. Bergogne, "State of the art of dv/dt and di/dt control of insulated gate power switches," in Proc. Conf. Power Supply Energy Manage. Def. Appl., Jan. 2007.
15. N. Idir, R. Bausiere, and J. J. Franchaud, "Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors," IEEE Trans. Power Electron., vol. 21, no. 4, pp. 849-855, Jul. 2006. (Pubitemid 44194168)
16. S. Park and T. M. Jahns, "Flexible dv/dt and di/dt control method for insulated gate power switches," IEEE ASSP Mag. Trans. Ind. Appl., vol. 39, no. 3, pp. 657-664, May/Jun. 2003.
17. M. Rashid, Power Electronics Handbook. New York: Academic, 2001.
18. International Rectifier [Online]. Available:http://www.irf.com
19. CREE [Online]. Available:http://www.cree.com
20. Y. Wang, C. J. Cass, T. P. Chow, F. Wang, and D. Boroyevich, "SPICE model of SiC JFETs for circuit simulations," in Proc. IEEE Workshop Comput. Power Electron., Jul. 2006, pp. 212-215.
21. I. Josifovic, J. Popovic-Gerber, and J. Ferreira, "Improving SiC JFET switching behavior under influence of circuit parasitics," IEEE Trans. Power Electron., vol. 27, no. 8, pp. 3843-3854, Aug. 2012.
22. T. Funaki, T. Kimoto, and T. Hikihara, "Evaluation of capacitance-voltage characteristics for high voltage SiC-JFET," IEICE Electron. Expr., vol. 4, no. 16, pp. 517-523, Aug. 2007.