DySER: Unifying functionality and parallelism specialization for energy-efficient computing

IEEE Micro

Volumn 32, Issue 5, 2012, Pages 38-51

  Govindaraju, Venkatraman ^a   Ho, Chen Han ^a   Nowatzki, Tony ^a   Chhugani, Jatin ^b   Satish, Nadathur ^b   Sankaralingam, Karthikeyan ^a   Kim, Changkyu ^b  

^a University of Wisconsin Madison   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

accelerator; architecture; data level parallelism; DySER; energy efficiency; specialization

Indexed keywords

DATA-LEVEL PARALLELISM; DYSER; ENERGY EFFICIENT; GPU ACCELERATIONS; OUT OF ORDER; PRACTICAL IMPLEMENTATION; SPECIALIZATION; STREAMING SIMD EXTENSIONS;

ARCHITECTURE; HARDWARE; MICROWAVE INTEGRATED CIRCUITS; PARTICLE ACCELERATORS;

ENERGY EFFICIENCY;

EID: 84869168810     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2012.51     Document Type: Article

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