-
1
-
-
77954999026
-
-
Extech 380801. http://www.extech.com/instrument/products/310-399/380801. html.
-
-
-
-
2
-
-
77954967052
-
-
NVIDIA GeForce series GTX280, 8800GTX, 8800GT
-
NVIDIA GeForce series GTX280, 8800GTX, 8800GT. http://www.nvidia.com/ geforce.
-
-
-
-
4
-
-
0032592096
-
Design challenges of technology scaling
-
S. Borkar. Design challenges of technology scaling. IEEE Micro, 19(4):23-29, 1999.
-
(1999)
IEEE Micro
, vol.19
, Issue.4
, pp. 23-29
-
-
Borkar, S.1
-
5
-
-
0033719421
-
Wattch: A framework for architectural-level power analysis and optimizations
-
D. Brooks, V. Tiwari, and M. Martonosi. Wattch: a framework for architectural-level power analysis and optimizations. In ISCA-27, 2000.
-
(2000)
ISCA-27
-
-
Brooks, D.1
Tiwari, V.2
Martonosi, M.3
-
6
-
-
0034427485
-
A static powermodel for architects
-
J. A. Butts and G. S. Sohi. A static powermodel for architects. Microarchitecture, 0:191-201, 2000.
-
(2000)
Microarchitecture
, pp. 191-201
-
-
Butts, J.A.1
Sohi, G.S.2
-
7
-
-
28444464524
-
Power prediction for intel xscale processors using performance monitoring unit events
-
G. Contreras and M. Martonosi. Power prediction for intel xscale processors using performance monitoring unit events. In ISLPED, 2005.
-
(2005)
ISLPED
-
-
Contreras, G.1
Martonosi, M.2
-
8
-
-
77955011583
-
Reducing queuing stalls caused by data prefetching
-
R. Fu, A. Zhai, P.-C. Yew, W.-C. Hsu, and J. Lu. Reducing queuing stalls caused by data prefetching. In INTERACT-11, 2007.
-
(2007)
INTERACT-11
-
-
Fu, R.1
Zhai, A.2
Yew, P.-C.3
Hsu, W.-C.4
Lu, J.5
-
9
-
-
70450231944
-
An analytical model for a gpu architecture with memory-level and thread-level parallelism awareness
-
S. Hong and H. Kim. An analytical model for a gpu architecture with memory-level and thread-level parallelism awareness. In ISCA, 2009.
-
(2009)
ISCA
-
-
Hong, S.1
Kim, H.2
-
10
-
-
70449914192
-
On the energy efficiency of graphics processing units for scientific computing
-
S. Huang, S. Xiao, and W. Feng. On the energy efficiency of graphics processing units for scientific computing. In IPDPS, 2009.
-
(2009)
IPDPS
-
-
Huang, S.1
Xiao, S.2
Feng, W.3
-
12
-
-
84944414165
-
Runtime power monitoring in high-end processors: Methodology and empirical data
-
C. Isci and M. Martonosi. Runtime power monitoring in high-end processors: Methodology and empirical data. In MICRO, 2003.
-
(2003)
MICRO
-
-
Isci, C.1
Martonosi, M.2
-
13
-
-
70649104826
-
A characterization and analysis of ptx kernels
-
A. Kerr, G. Diamos, and S. Yalamanchili. A characterization and analysis of ptx kernels. In IISWC, 2009.
-
(2009)
IISWC
-
-
Kerr, A.1
Diamos, G.2
Yalamanchili, S.3
-
14
-
-
34548142850
-
Power-performance considerations of parallel computing on chip multiprocessors
-
J. Li and J. F. Martínez. Power-performance considerations of parallel computing on chip multiprocessors. ACM Trans. Archit. Code Optim., 2(4):397-422, 2005.
-
(2005)
ACM Trans. Archit. Code Optim.
, vol.2
, Issue.4
, pp. 397-422
-
-
Li, J.1
Martínez, J.F.2
-
18
-
-
33646864552
-
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer cmos circuits
-
Feb
-
K. Roy, S. Mukhopadhyay, and H. Mahmoodi-Meimand. Leakage current mechanisms and leakage reduction techniques in deep-submicrometer cmos circuits. Proceedings of the IEEE, 91(2):305-327, Feb 2003.
-
(2003)
Proceedings of the IEEE
, vol.91
, Issue.2
, pp. 305-327
-
-
Roy, K.1
Mukhopadhyay, S.2
Mahmoodi-Meimand, H.3
-
19
-
-
77954985414
-
A flexible simulation framework for graphics architectures
-
J. W. Sheaffer, D. Luebke, and K. Skadron. A flexible simulation framework for graphics architectures. In HWWS, 2004.
-
(2004)
HWWS
-
-
Sheaffer, J.W.1
Luebke, D.2
Skadron, K.3
-
20
-
-
85009352442
-
Temperature-aware microarchitecture: Modeling and implementation
-
K. Skadron, M. R. Stan, K. Sankaranarayanan, W. Huang, S. Velusamy, and D. Tarjan. Temperature-aware microarchitecture: Modeling and implementation. ACM Trans. Archit. Code Optim., 1(1):94-125, 2004.
-
(2004)
ACM Trans. Archit. Code Optim.
, vol.1
, Issue.1
, pp. 94-125
-
-
Skadron, K.1
Stan, M.R.2
Sankaranarayanan, K.3
Huang, W.4
Velusamy, S.5
Tarjan, D.6
-
21
-
-
1542269367
-
Full chip leakage estimation considering power supply and temperature variations
-
H. Su, F. Liu, A. Devgan, E. Acar, and S. Nassif. Full chip leakage estimation considering power supply and temperature variations. In ISLPED, 2003.
-
(2003)
ISLPED
-
-
Su, H.1
Liu, F.2
Devgan, A.3
Acar, E.4
Nassif, S.5
-
22
-
-
70549085458
-
Feedback driven threading: Power-efficient and high-performance execution of multithreaded workloads on cmps
-
M. A. Suleman, M. K. Qureshi, and Y. N. Patt. Feedback driven threading: Power-efficient and high-performance execution of multithreaded workloads on cmps. In ASPLOS-XIII, 2008.
-
(2008)
ASPLOS-XIII
-
-
Suleman, M.A.1
Qureshi, M.K.2
Patt, Y.N.3
-
23
-
-
65949107549
-
Roofline: An insightful visual performance model for multicore architectures
-
S. Williams, A. Waterman, and D. Patterson. Roofline: an insightful visual performance model for multicore architectures. Commun. ACM, 52(4):65-76, 2009.
-
(2009)
Commun. ACM
, vol.52
, Issue.4
, pp. 65-76
-
-
Williams, S.1
Waterman, A.2
Patterson, D.3
-
24
-
-
67650300737
-
-
Technical report University of Virginia
-
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects. Technical report, University of Virginia, 2003.
-
(2003)
Hotleakage: A Temperature-aware Model of Subthreshold and Gate Leakage for Architects
-
-
Zhang, Y.1
Parikh, D.2
Sankaranarayanan, K.3
Skadron, K.4
Stan, M.5
|