Investigation of threshold voltage instability induced by gate bias stress in ZnO nanowire field effect transistors

Nanotechnology

Volumn 23, Issue 48, 2012, Pages

  Choe, Minhyeok ^a   Park, Woojin ^a   Kang, Jang Won ^a   Jeong, Sehee ^a   Hong, Woong Ki ^b   Lee, Byoung Hun ^a   Park, Seong Ju ^a   Lee, Takhee ^c  

^a Gwangju Institute of Science and Technology (GIST)   (South Korea)

^b Korea Basic Science Institute (KBSI)   (South Korea)

^c Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC LAYER; ELECTRICAL CHARACTERISTIC; ELECTRICAL CONDUCTANCE; GATE BIAS; GATE-BIAS STRESS; INTERFACE TRAPS; REPETITIVE OPERATIONS; VOLTAGE INSTABILITY; ZNO; ZNO NANOWIRES;

FIELD EFFECT TRANSISTORS; NANOWIRES;

ZINC OXIDE;

EID: 84869071806     PISSN: 09574484     EISSN: 13616528     Source Type: Journal    
DOI: 10.1088/0957-4484/23/48/485201     Document Type: Article

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