Evaluation of 3D interconnect routing and stacking strategy to optimize high speed signal transmission for memory on logic

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2012, Pages 8-13

  Roullard, J ^a   Farcy, A ^b   Capraro, S ^a   Lacrevaz, T ^a   Bermond, C ^a   Houzet, G ^a   Charbonnier, J ^c   Fuchs, C ^c   Ferrandon, C ^c   Leduc, P ^c   Flechet, B ^a  

^a UNIVERSITÉ DE SAVOIE   (France)

^b STMICROELECTRONICS   (France)

^c CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

3D INTERCONNECT; 3D STACKING; 3D STACKING TECHNOLOGY; DATA RATES; FACE TO FACE; HIGH SPEED SIGNAL TRANSMISSION; HIGH-SPEED DATA TRANSMISSION; INTEGRATION DENSITY; LOGIC APPLICATIONS; ROADMAP;

DATA COMMUNICATION SYSTEMS;

THREE DIMENSIONAL COMPUTER GRAPHICS;

EID: 84866864783     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2012.6248798     Document Type: Conference Paper

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