Design and implementation of a non-destructive test circuit for SiC-MOSFETs

Conference Proceedings - 2012 IEEE 7th International Power Electronics and Motion Control Conference - ECCE Asia, IPEMC 2012

Volumn 1, Issue , 2012, Pages 10-15

  Wada, Keiji ^a   Nishizawa, Shin Ichi ^b   Ohashi, Hiromichi ^b  

^a TOKYO METROPOLITAN UNIVERSITY   (Japan)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

Failure Mechanism; Non Destructive Test Circuit; Short Circuit Test; SiC MOSFET

Indexed keywords

DOUBLE DIFFUSION; EXTREME CONDITIONS; FAILURE MECHANISM; HIGH POWER DENSITY CONVERTER; IMPROVING EFFICIENCY; INVERTER CIRCUIT; MOSFETS; NON-DESTRUCTIVE TEST; POWER DEVICES; SHORT CIRCUIT TESTS; SIC-MOSFET; SUPER JUNCTIONS; SWITCHING OPERATIONS;

ELECTRIC EQUIPMENT; MOTION CONTROL; NONDESTRUCTIVE EXAMINATION; POWER ELECTRONICS; SILICON; SILICON CARBIDE;

MOSFET DEVICES;

EID: 84866780148     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPEMC.2012.6258831     Document Type: Conference Paper

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