Scale-out processors

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2012, Pages 500-511

  Lotfi Kamran, Pejman ^a   Grot, Boris ^a   Ferdman, Michael ^a,b   Volos, Stavros ^a   Kocberber, Onur ^a   Picorel, Javier ^a   Adileh, Almutaz ^a   Jevdjic, Djordje ^a   Idgunji, Sachin ^c   Ozer, Emre ^c   Falsafi, Babak ^a  

^a EPFL   (Switzerland)

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c ARM LTD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT INTERCONNECTS;

ACCESS LATENCY; DATACENTER; DIE AREA; EMERGING APPLICATIONS; LARGE CACHES; LAST-LEVEL CACHES; ON-DIE CACHE; PERFORMANCE; SERVER PROCESSORS; WEB SEARCHES;

THROUGHPUT;

EID: 84864861874     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2366231.2337217     Document Type: Conference Paper

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