Design rules for IGZO logic gates on plastic foil enabling operation at bending radii of 3.5 mm

IEEE Transactions on Electron Devices

Volumn 59, Issue 8, 2012, Pages 2153-2159

  Münzenrieder, Niko ^a   Zysset, Christoph ^a   Kinkeldei, Thomas ^a   Tröster, Gerhard ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

Amorphous InGaZnO; circuit design; flexible electronics; strain; thin film circuits

Indexed keywords

AMORPHOUS INGAZNO; BENDING EXPERIMENTS; BENDING RADIUS; CIRCUIT DESIGNS; CIRCUIT FAILURES; DESIGN RULES; FIELD-EFFECT MOBILITIES; FLAT SUBSTRATES; GEOMETRICAL DESIGNS; LOW OUTPUT VOLTAGE; METAL OXIDE SEMICONDUCTOR; N-CHANNEL; NAND GATE; OSCILLATION FREQUENCY; PERFORMANCE DEGRADATION; PLASTIC FOILS; RING OSCILLATOR; RISETIMES; SUPPLY VOLTAGES; TENSILE MECHANICAL STRAIN;

DEGRADATION; FIELD EFFECT TRANSISTORS; FLEXIBLE ELECTRONICS; LOGIC CIRCUITS; SEMICONDUCTING INDIUM COMPOUNDS; STRAIN; THIN FILM CIRCUITS; THIN FILM TRANSISTORS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 84864748287     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2012.2198480     Document Type: Article

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