Cost-effective power delivery to support per-core voltage domains for power-constrained processors

Proceedings - Design Automation Conference

Volumn , Issue , 2012, Pages 56-61

  Ghasemi, Hamid Reza ^a   Sinkar, Abhishek A ^a   Schulte, Michael J ^b   Kim, Nam Sung ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

^b ADVANCED MICRO DEVICES   (United States)

Author keywords

multi core processors; power delivery; voltage regulators

Indexed keywords

HIGH COSTS; HIGH QUALITY; MULTI-CORE PROCESSOR; OFF-CHIP; ON CHIPS; PACKAGE DESIGNS; POWER CONSTRAINTS; POWER DELIVERY; POWER EFFICIENCY; POWER-GATING; TECHNICAL CHALLENGES; VOLTAGE DOMAINS; VOLTAGE VARIATION;

COMPUTER AIDED DESIGN; COST EFFECTIVENESS; COSTS; VOLTAGE REGULATORS;

ELECTRIC POWER TRANSMISSION;

EID: 84863552323     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2228360.2228372     Document Type: Conference Paper

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