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Volumn 59, Issue 11, 2012, Pages 4148-4154

Design and implementation of a new multilevel inverter topology

Author keywords

Multilevel inverter; power electronics; SPWM; topology

Indexed keywords

CARRIER SIGNALS; DC-LINK VOLTAGES; GATE DRIVES; HIGH-POWER; HIGH-VOLTAGES; MULTILEVEL INVERTER; MULTILEVEL INVERTER TOPOLOGY; NUMBER OF COMPONENTS; OUTPUT VOLTAGES; OVERALL COSTS; PULSE WIDTH MODULATION CONTROL; SEVEN-LEVEL; SPWM;

EID: 84862988637     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2011.2176691     Document Type: Article
Times cited : (404)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.