Full-chip runtime error-tolerant thermal estimation and prediction for practical thermal management

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2011, Pages 716-723

  Wang, Hai ^a   Tan, Sheldon X D ^a   Liao, Guangdeng ^a   Quintanilla, Rafael ^b   Gupta, Ashish ^b  

^a University of California Riverside   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPACT MODELING; COMPENSATION METHOD; COMPENSATION PROCESS; ERROR TOLERANT; HIGH PERFORMANCE PROCESSORS; HOT SPOT; LOW OVERHEAD; NEW CORRELATIONS; ON CHIPS; POWER ESTIMATIONS; RUNTIMES; TEMPERATURE ESTIMATION; TEMPERATURE PREDICTION; THERMAL BEHAVIORS; THERMAL MODEL; THERMAL PREDICTION; THERMAL SENSORS; TIME SERIES PREDICTION;

COMPUTER AIDED DESIGN; ESTIMATION; FORECASTING; SENSORS; TEMPERATURE CONTROL; THERMOGRAPHY (TEMPERATURE MEASUREMENT); TIME SERIES;

ERROR COMPENSATION;

EID: 84862956699     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2011.6105408     Document Type: Conference Paper

References (23)

1. J. Donald and M. Martonosi, "Techniques for multicore thermal management: Classification and new exploration," in Proceedings of the 33rd annual international symposium on Computer Architecture, ISCA '06, (Washington, DC, USA), pp. 78-88, IEEE Computer Society, 2006.
2. K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan, "Temperature-aware microarchitecture," in International Symposium on Computer Architecture, pp. 2-13, 2003.
3. F. Zanini, D. Atienza, L. Benini, and G. De Micheli, "Multicore thermal management with model predictive control," in Proc. 19th European Conference on Cicuit Theory and Design, (Piscataway, NJ, USA), pp. 90-95, IEEE Press, 2009.
4. Y. Wang, K. Ma, and X. Wang, "Temperature-constrained power control for chip multiprocessors with online model estimation," in International Symposium on Computer Architecture, pp. 314-324, 2009.
5. I. Yeo, C. C. Liu, and E. J. Kim, "Predictive dynamic thermal management for multicore systems," in Proc. Design Automation Conf. (DAC), DAC '08, (New York, NY, USA), pp. 734-739, ACM, 2008.
6. W. Huang, S. Ghosh, S. Velusamy, K. Sankaranarayanan, K. Skadron, and M. R. Stan, "HotSpot: A compact thermal modeling methodology for early-stage VLSI design," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 14, pp. 501-513, May 2006.
7. Y. Yang, Z. P. Gu, C. Zhu, R. P. Dick, and L. Shang, "ISAC: Integrated space and time adaptive chip-package thermal analysis," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, no. 1, pp. 86-99, 2007.
8. S. Sharifi and T. S. Rosing, "Accurate direct and indirect on-chip temperature sensing for efficient dynamic thermal management," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, pp. 1586-1599, Oct. 2010.
9. Y. Zhang and A. Srivastava, "Adaptive and autonomous thermal tracking for high performance computing systems," in Proc. Design Automation Conf. (DAC), pp. 68-73, 2010.
10. R. Cochran and S. Reda, "Spectral techniques for high-resolution thermal characterization with limited sensor data," in Proc. Design Automation Conf. (DAC), pp. 478-483, 2009.
11. J. Long, S. Ogrenci Memik, G. Memik, and R. Mukherjee, "Thermal monitoring mechanisms for chip multiprocessors," ACM Transactions on Architecture and Code Optimization, vol. 5, pp. 9:1-9:33, August 2008.
12. P. Liu, H. Li, L. Jin, W. Wu, S. X.-D. Tan, and J. yang, "Fast thermal simulation for runtime temperature tracking and management," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, pp. 2882-2893, Dec. 2006.
13. A. K. Coskun, T. S. Rosing, and K. C. Gross, "Utilizing predictors for efficient thermal management in multiprocessor SoCs," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, pp. 1503-1516, October 2009.
14. R. Cochran and S. Reda, "Consistent runtime thermal prediction and control through workload phase detection," in Proc. Design Automation Conf. (DAC), pp. 62-67, 2010.
15. Y.-K. Cheng, C.-H. Tsai, C.-C. Teng, and S.-M. Kang, Electrothermal Analysis of VLSI Systems. Kluwer Academic Publishers, 2000.
16. C. Isci and M. Martonosi, "Runtime power monitoring in high-end processors: Methodology and empirical data," in Proceedings of MICRO, 2003.
17. M. D. Powell, A. Biswas, J. S. Emer, S. S. Mukherjee, B. R. Sheikh, and S. Yardi, "CAMP: A technique to estimate per-structure power at run-time using a few simple parameters," in International Symposium on Computer Architecture, pp. 289-300, 2008.
18. S. Ogrenci Memik, R. Mukherjee, M. Ni, and J. Long, "Optimizing thermal sensor allocation for microprocessors," IEEE Trans. on Computer- Aided Design of Integrated Circuits and Systems, vol. 27, pp. 516-527, March 2008.
19. A. C. Antoulas, Approximation of Large-Scale Dynamical Systems. The Society for Industrial and Applied Mathematics (SIAM), 2005.
20. R. W. Freund, "SPRIM: structure-preserving reduced-order interconnect macromodeling," in Proc. Int. Conf. on Computer Aided Design (IC- CAD), pp. 80-87, 2004.
21. G. Box, G. M. Jenkins, and G. C. Reinsel, Time Series Analysis: Forecasting and Control. Prentice-Hall, 3rd ed., 1994.
22. D. Brooks, V. Tiwari, and M. Martonosi, "Wattch: A framework for architectural-level power analysis and optimizations," in International Symposium on Computer Architecture, pp. 83-94, 2000.
23. J. L. Henning, "SPEC CPU 2000: Measuring CPU performance in the new millennium," IEEE computer, vol. 1, pp. 28-35, July 2000.