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Volumn 73, Issue , 2012, Pages 7-10

Electrical characteristics of 20-nm junctionless Si nanowire transistors

Author keywords

Drain induced barrier lowering; Junctionless transistor; Multigate; Nanowire transistor; Short channel characteristics; Subthreshold slope

Indexed keywords

MULTIPLE-GATE FIELD-EFFECT TRANSISTORS; NANOWIRES;

EID: 84859374749     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2011.11.032     Document Type: Letter
Times cited : (142)

References (9)
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    • (2003) IEEE Electron Dev Lett , vol.24 , Issue.3 , pp. 186-188
    • Lee, J.-S.1    Choi, Y.-K.2    Ha, D.3    King, T.J.4    Bokor, J.5
  • 2
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    • Y. Jiang, T.-Y. Liow, N. Singh, L.H. Tan, G.-Q. Lo, and D. Chan Nickel salicided source/drain extension for performance improvement in ultrascaled (sub 10 nm) Si-nanowire transistors IEEE Electron Dev Lett 30 2 2009 195 197
    • (2009) IEEE Electron Dev Lett , vol.30 , Issue.2 , pp. 195-197
    • Jiang, Y.1    Liow, T.-Y.2    Singh, N.3    Tan, L.H.4    Lo, G.-Q.5    Chan, D.6
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    • 79151480956 scopus 로고    scopus 로고
    • Sensitivity of threshold voltage to nanowire width variation in junctionless transistors
    • S.-J. Choi, D.-I. Moon, S. Kim, J.P. Duarte, and Y.-K. Choi Sensitivity of threshold voltage to nanowire width variation in junctionless transistors IEEE Electron Dev Lett 32 2 2011 125 127
    • (2011) IEEE Electron Dev Lett , vol.32 , Issue.2 , pp. 125-127
    • Choi, S.-J.1    Moon, D.-I.2    Kim, S.3    Duarte, J.P.4    Choi, Y.-K.5
  • 8
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    • The voltage-doping transformation: A new approach to the modeling of MOSFET short-channel effects
    • T. Skotnicki, G. Merckel, and G. Pedron The voltage-doping transformation: a new approach to the modeling of MOSFET short-channel effects IEEE Electron Dev Lett 9 3 1988 109 112 (Pubitemid 18611962)
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    • Skotnicki, T.1    Merckel, G.2    Pedron, T.3
  • 9
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    • Investigation of high-performance sub-50 nm junctionless nanowire transistors
    • R. Yan, A. Kranti, I. Ferain, C.-W. Lee, R. Yu, and N. Dehdashti Investigation of high-performance sub-50 nm junctionless nanowire transistors Microelectron Rel 51 2011 1166 1171
    • (2011) Microelectron Rel , vol.51 , pp. 1166-1171
    • Yan, R.1    Kranti, A.2    Ferain, I.3    Lee, C.-W.4    Yu, R.5    Dehdashti, N.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.