Teaching memory circuit elements via experiment-based learning

IEEE Circuits and Systems Magazine

Volumn 12, Issue 1, 2012, Pages 64-74

  Pershin, Yuriy V ^a   Di Ventra, Massimiliano ^b  

^a UNIVERSITY OF SOUTH CAROLINA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BASIC PROPERTIES; CROSS-BAR MEMORIES; FUNDAMENTAL PROPERTIES; HANDS-ON EXPERIENCES; MEMORY CIRCUITS; OFF-THE-SHELF COMPONENTS; OPTIMIZATION PROBLEMS; TEACHING TOOLS; TOTAL COSTS; UNDERGRADUATE TEACHING;

COMPUTATIONAL LINGUISTICS; EXPERIMENTS; QUANTUM COMPUTERS; TEACHING;

PROBLEM SOLVING;

EID: 84858214639     PISSN: 1531636X     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCAS.2011.2181096     Document Type: Article

References (52)

1. M. Di Ventra, Y. V. Pershin, and L. O. Chua, "Circuit elements with memory: Memristors, memcapacitors, and meminductors," Proc. IEEE, vol. 97, no. 10, pp. 1717-1724, 2009.
2. L. O. Chua, "Memristor-The missing circuit element," IEEE Trans. Circuit Theory, vol. 18, pp. 507-519, 1971.
3. L. O. Chua and S. M. Kang, "Memristive devices and systems," Proc. IEEE, vol. 64, pp. 209-223, 1976.
4. Y. V. Pershin and M. Di Ventra, "Memory effects in complex materials and nanoscale systems," Adv. Phys., vol. 60, pp. 145-227, 2011.
5. J. E. Green, J. W. Choi, A. Boukai, Y. Bunimovich, E. Johnston-Halperin, E. DeIonno, Y. Luo, B. A. Sheriff, K. Xu, Y. S. Shin, H.-R. Tseng, J. F. Stoddart, and J. R. Heath, "A 160-kilobit molecular electronic memory patterned at 1011 bits per square centimetre," Nature, vol. 445, p. 414, 2007.
6. S. F. Karg, G. I. Meijer, J. G. Bednorz, C. T. Rettner, A. G. Schrott, E. A. Joseph, C. H. Lam, M. Janousch, U. Staub, F. La Mattina, S. F. Alvarado, D. Widmer, R. Stutz, U. Drechsler, and D. Caimi, "Transition-metaloxidebased resistance-change memories," IBM J. Res. Dev., vol. 52, no. 4-5, pp. 481-492, July-Sept. 2008.
7. A. Sawa, "Resistive switching in transition metal oxides," Mat. Today, vol. 11, pp. 28-36, 2008. (Pubitemid 351680723)
8. Y. V. Pershin and M. Di Ventra, "Solving mazes with memristors: A massively-parallel approach," Phys. Rev. E, vol. 84, p. 046703, 2011.
9. Y. V. Pershin and M. Di Ventra, "Experimental demonstration of associative memory with memristive neural networks," Neural Netw., vol. 23, p. 881, 2010.
10. S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, "Nanoscale memristor device as synapse in neuromorphic systems," Nano Lett., vol. 10, pp. 1297-1301, 2010.
11. H. Choi, H. Jung, J. Lee, J. Yoon, J. Park, D.-J. Seong, W. Lee, M. Hasan, G.-Y. Jung, and H. Hwang, "An electrically modifi able synapse array of resistive switching memory," Nanotechnology, vol. 20, p. 345201, 2009.
12. Q. Lai, L. Zhang, Z. Li, W. F. Stickle, R. S. Williams, and Y. Chen, "Ionic/electronic hybrid materials integrated in a synaptic transistor with signal processing and learning functions," Adv. Mater., vol. 22, p. 2448, 2010.
13. F. Alibart, S. Pleutin, D. Guerin, C. Novembre, S. Lenfant, K. Lmimouni, C. Gamrat, and D. Vuillaume, "An organic nanoparticle transistor behaving as a biological spiking synapse," Adv. Funct. Mater., vol. 20, pp. 330-337, 2010.
14. M. P. Fontana, private communication, 2010.
15. D. Strukov and K. Likharev, "CMOL FPGA: A reconfi gurable architecture for hybrid digital circuits with two-terminal nanodevices," Nanotechnology, vol. 16, pp. 888-900, 2005. (Pubitemid 40666599)
16. G. S. Snider and R. S. Williams, "Nano/CMOS architectures using a fi eld-programmable nanowire interconnect," Nanotechnology, vol. 18, p. 035204, 2007.
17. J. Borghetti, G. S. Snider, P. J. Kuekes, J. J. Yang, D. R. Stewart, and R. S. Williams, "Memristive' switches enable 'stateful' logic operations via material implication," Nature, vol. 464, pp. 873-876, 2010.
18. Y. V. Pershin and M. Di Ventra. (2012). Neuromorphic, digital and quantumcomputation with memory circuit elements. Proc. IEEE. [Online]. Available: Http://dx.doi.org/10.1109/JPROC.2011.2166369
19. Y. V. Pershin, S. La Fontaine, and M. Di Ventra, "Memristive model of amoeba learning," Phys. Rev. E, vol. 80, p. 021926, 2009.
20. G. K. Johnsen, C. A. Lütken, O. G. Martinsen, and S. Grimnes, "Memristive model of electro-osmosis in skin," Phys. Rev. E, vol. 83, p. 031916, 2011.
21. "Announced by Stan Williams, HP," presented at the IEF 2011 Meeting, Seville, Spain, Oct. 2011.
22. Y. V. Pershin and M. Di Ventra, "Practical approach to programmable analog circuits with memristors," IEEE Trans. Circuits Syst. I, vol. 57, p. 1857, 2010.
23. Y. V. Pershin and M. Di Ventra, "Emulation of fl oating memcapacitors and meminductors using current conveyors," Electron. Lett., vol. 47, p. 243, 2011.
24. J. Albo-Canals and G. E. Pazienza, "How to teach memristors in EE undergraduate courses," in Proc. 2011 Int. Symp. Circuits and Systems (ISCAS), 2011, pp. 345-348.
25. Y. V. Pershin and M. Di Ventra, "Memristive circuits simulate memcapacitors and meminductors," Electron. Lett., vol. 46, pp. 517-518, 2010.
26. D. Biolek and V. Biolkova, "Mutator for transforming memristor into memcapacitor," Electron. Lett., vol. 46, p. 1428, 2010.
27. D. Biolek, V. Biolkova, and Z. Kolka, "Low-voltage-low-power current conveyor for battery supplied memristor emulator," in Proc. 5th Int. Conf. Circuits, Systems and Signals (CSS'11), 2011, p. 171.
28. D. Biolek and V. Biolkova, "Hybrid modelling and emulation of memsystems," Int. J. Numer. Model., to be published.
29. X. Wang, A. Fitch, H. Iu, and W. Qi. (2011). Design of a memcapacitor emulator based on a memristor. Phys. Lett. A. [Online]. Available: Http:/sciencedirect www.com/science/article/pii/S037596011101365X
30. [Online]. Available: Http://www.physics.sc.edu/%7epershinhtm emulator.
31. J. J. Yang, M. D. Pickett, X. Li, D. A. A. Ohlberg, D. R. Stewart, and R. S. Williams, "Memristive switching mechanism for metal/oxide/metal nanodevices," Nat. Nanotechnol., vol. 3, pp. 429-433, 2008.
32. S. H. Jo, K.-H. Kim, and W. Lu, "High-density crossbar arrays based on a SI memristive system," Nano Lett., vol. 9, pp. 870-874, 2009.
33. R. R. Waser and M. Aono, "Nanoionics-based resistive switching memories," Nat. Mater., vol. 6, pp. 833-840, 2007. (Pubitemid 350064191)
34. J. Martinez-Rincon, M. Di Ventra, and Y. V. Pershin, "Solid-state memcapacitive system with negative and diverging capacitance," Phys. Rev. B, vol. 81, p. 195430, 2010.
35. Y. V. Pershin and M. Di Ventra, "Spin memristive systems: Spin memory effects in semiconductor spintronics," Phys. Rev. B, vol. 78, pp. 113 309-1-113 309-4, 2008.
36. X. Wang, Y. Chen, H. Xi, H. Li, and D. Dimitrov, "Spintronic memristor through spin-torque-induced magnetization motion," IEEE Electron. Device Lett., vol. 30, pp. 294-297, 2009.
37. J. Martinez-Rincon and Y. V. Pershin, "Bistable non-volatile elastic membrane memcapacitor exhibiting chaotic behavior," IEEE Trans. Electron. Devices, vol. 58, p. 1809, 2011.
38. C. D. Wright, Y. Liu, K. I. Kohary, M. M. Aziz, and R. J. Hicken, "Arithmetic and biologically-inspired computing using phase-change materials," Adv. Mater., vol. 23, pp. 3408-3413, 2011.
39. M. Krems, Y. V. Pershin, and M. Di Ventra, "Ionic memcapacitive effects in nanopores," Nano Lett., vol. 10, p. 2674, 2010.
40. F. Corinto, A. Ascoli, and M. Gilli, "Analysis of current-voltage characteristics for memristive elements in pattern recognition systems," submitted for publication.
41. A. Stotland and M. Di Ventra, "Stochastic memory: Memory enhancement due to noise," Phys. Rev. E, vol. 85, p. 011116, 2012.
42. T. Driscoll, Y. V. Pershin, D. N. Basov, and M. Di Ventra, "Chaotic memristor," Appl. Phys. A, vol. 102, p. 885, 2011.
43. T. Saigusa, A. Tero, T. Nakagaki, and Y. Kuramoto, "Amoebae anticipate periodic events," Phys. Rev. Lett., vol. 100, p. 018101, 2008.
44. L. S. Smith, "Neuromorphic systems: Past, present and future," in Brain Inspired Cognitive Systems 2008 (Advances in Experimental Medicine and Biology), vol. 657, A. Hussain, I. Aleksander, L. Smith, A. Barros, R. Chrisley, and V. Cutsuridis, Eds. 2010, pp. 167-182.
45. G. S. Snider, "Cortical computing with memristive nanodevices," Sci-DAC Rev., vol. 10, pp. 58-65, 2008.
46. V. V. Erokhin, T. S. Berzina, and M. P. Fontana, "Polymeric elements for adaptive networks," Crystallogr. Rep., vol. 52, pp. 159-166, 2007. (Pubitemid 46198052)
47. W. S. Zhao, G. Agnus, V. Derycke, A. Filoramo, J.-P. Bourgoin, and C. Gamrat, "Nanotube devices based crossbar architecture: Toward neuromorphic computing," Nanotechnology, vol. 21, no. 17, p. 175202, 2010.
48. A. L. Hodgkin and A. F. Huxley, "A quantitative description of membrane current and its application to conduction and excitation in nerve," J. Physiol., vol. 117, pp. 500-544, 1952.
49. I. Pavlov, Conditioned Reflexes: An Investigation of the Physiological Activity of the Cerebral Cortex (Transl: By G. V. Anrep). London: Oxford Univ. Press, 1927.
50. E. Lehtonen and M. Laiho, "Stateful implication logic with memristors," in Proc. 2009 Int. Symp. Nanoscale Architectures (NANOARCH'09), 2009, pp. 33-36.
51. ITRS. (2009). The International Technology Roadmap for Semiconductors-ITRS 2009 Edition. [Online]. Available: Http://www.itrs.net
52. E. Linn, R. Rosezin, and R. Waser, "Complementary resistive switches for passive nanocrossbar memories," Nature Mater., vol. 9, p. 403, 2010.