A 0.47-1.6mW 5bit 0.5-1GS/s time-interleaved SAR ADC for low-power UWB radios

European Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 147-150

  Harpe, Pieter ^a   Busze, Ben ^a   Philips, Kathleen ^a   De Groot, Harmke ^a  

^a HOLST CENTRE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; DECOUPLING CAPACITOR; DISTRIBUTED CLOCKS; LOW POWER; OFFSET CALIBRATION; SAR ADC; TIME-INTERLEAVED; UWB RADIOS;

CALIBRATION; CAPACITORS; ENERGY EFFICIENCY;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 82955194925     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2011.6044886     Document Type: Conference Paper

References (9)

1. Y. J. Zheng et al., .A 0.92/5.3nJ/b UWB impulse radio SoC for communication and localization, ISSCC Dig. Tech. Papers, pp. 230 . 231, Feb. 2010.
2. M. de Nil, B. Busze, A. Young, D. Neirynck, H. Pflug, K. Philips, J. Huisken, J. Stuyt, and H. de Groot, .Low power IEEE 802.15.4a UWB digital Rx baseband architecture, in Ultra-Wideband (ICUWB), 2010 IEEE International Conference on, 2010, pp. 1 . 4.
3. B. Verbruggen, J. Craninckx, M. Kuijk, P. Wambacq, and G. van der Plas, .A 2.2mW 5b 1.75GS/s folding flash ADC in 90nm digital CMOS, ISSCC Dig. Tech. Papers, pp. 252 . 253, Feb. 2008.
4. B. Verbruggen, et al., .A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS, ISSCC Dig. Tech. Papers, pp. 296 . 297, Feb. 2010.
5. B. P. Ginsburg and A. P. Chandrakasan, .Highly interleaved 5-bit, 250-MSample/s, 1.2-mW ADC with redundant channels in 65-nm CMOS,. IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2641 . 2650, Dec. 2008.
6. B. Alavi, K. Pahlavan, N. A. Alsindi, and L. Xinrong, .Indoor geolocation distance error modeling using UWB channel measurements, in proc. IEEE PIMRC 2005, 2005, pp. 481 . 485.
7. P. Harpe, C. Zhou, X. Wang, G. Dolmans, and H. de Groot, .A 12fJ/conversion-step 8bit 10MS/s asynchronous SAR ADC for low energy radios, in proc. ESSCIRC, 2010.
8. J. Bach, .Capacitive array,. Patent US 7 873 191, Jan., 2011.
9. M. van Elzakker, E. van Tuijl, P. Geraedts, D. Schinkel, E. Klumperink, and B. Nauta, .A 1.9μW 4:4fJ/conversion-step 10b 1MS/s charge-redistribution ADC, ISSCC Dig. Tech. Papers, pp. 244 . 245, Feb. 2008.