Stochastic computing: Embracing errors in architecture and design of processors and applications

Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11

Volumn , Issue , 2011, Pages 135-144

  Sartori, John ^a   Sloan, Joseph ^a   Kumar, Rakesh ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Error resilience; Stochastic computing

Indexed keywords

CIRCUIT DENSITY; COMPUTING TECHNIQUES; DEVICE SIZES; DRIVING FORCES; DYNAMIC CIRCUITS; ENERGY BENEFITS; ERROR RESILIENCE; HARDWARE ERROR; MANUFACTURING CHALLENGES; MARGINAL BENEFIT; MOORE'S LAW; NON-DETERMINISM; SEMICONDUCTOR SCALING; STATIC AND DYNAMIC; STOCHASTIC COMPUTING; TECHNOLOGY SCALING;

BEHAVIORAL RESEARCH; COMPUTER ARCHITECTURE; DESIGN; ERRORS; INNOVATION; MANUFACTURE; PROGRAM COMPILERS; STOCHASTIC SYSTEMS;

EMBEDDED SYSTEMS;

EID: 81255207081     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2038698.2038720     Document Type: Conference Paper

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