An open-loop clock generator for fast frequency scaling in 65nm CMOS technology

Proceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011

Volumn , Issue , 2011, Pages 264-269

  Höppner, Sebastian ^a   Henker, Stephan ^a   Eisenreich, Holger ^a   Schüffny, René ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

dynamic frequency scaling; frequency divider; GALS clocking; open loop clock generator; phase rotator

Indexed keywords

DYNAMIC FREQUENCY SCALING; FREQUENCY DIVIDERS; GALS CLOCKING; OPEN-LOOP CLOCK GENERATOR; PHASE ROTATOR;

ELECTRIC CLOCKS; INTEGRATED CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 80053314124     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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