Reliability analysis and improvement for multi-level non-volatile memories with soft information

Proceedings - Design Automation Conference

Volumn , Issue , 2011, Pages 753-758

  Chen, Shih Liang ^a   Ke, Bo Ru ^a   Chen, Jian Nan ^a   Huang, Chih Tsun ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

Error correction; low density parity check (LDPC) codes; multi level cell (MLC); non volatile flash memory; reliability

Indexed keywords

BIT ERROR RATE; COMPUTER AIDED DESIGN; ECONOMIC AND SOCIAL EFFECTS; ERROR CORRECTION; FLASH MEMORY; FORWARD ERROR CORRECTION; RELIABILITY;

ERROR CORRECTION CAPABILITY; ERROR-CORRECTION SCHEMES; LOW-DENSITY PARITY-CHECK (LDPC) CODES; MULTI LEVEL CELL (MLC); NON-VOLATILE; NON-VOLATILE MEMORY; REFERENCE VOLTAGES; SYSTEMATIC METHODOLOGY;

RELIABILITY ANALYSIS;

EID: 80052687995     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2024724.2024894     Document Type: Conference Paper

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