Impact of gate engineering on double gate MOSFETs using high-k dielectrics

ICECT 2011 - 2011 3rd International Conference on Electronics Computer Technology

Volumn 1, Issue , 2011, Pages 31-34

  Nirmal, ^a   Kumar, Vijaya ^b   Thomas, Divya Mary ^a   Shruti, K ^a   Samuel, Patrick Chella ^a   Kumar, Mohan ^c  

^a KARUNYA UNIVERSITY   (India)

^b KARPAGAM COLLEGE OF ENGINEERING   (India)

^c SKP Engineering College   (India)

Author keywords

Carrier transport efficiency; Dual material double gate (DM DG); Short channel effects

Indexed keywords

ANALOG APPLICATIONS; ANALOG PERFORMANCE; CARRIER TRANSPORT EFFICIENCY; CMOS CIRCUITS; DEVICE SIMULATORS; DOUBLE-GATE; DOUBLE-GATE MOSFETS; DUAL MATERIALS; DUAL METAL GATE; ELECTROSTATIC SURFACES; ENGINEERED DEVICES; ENGINEERING TECHNIQUES; EQUIVALENT OXIDE THICKNESS; GATE OXIDE; HIGH-GAIN; HIGH-K DIELECTRIC; HIGH-K DIELECTRIC MATERIALS; ISE TCAD; MOSFETS; ROADMAP; SHORT-CHANNEL EFFECT; STRONG INVERSION; SUBTHRESHOLD; SUBTHRESHOLD REGION; SYSTEM-ON-CHIP APPLICATIONS; ULTRA-LOW POWER;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; DRAIN CURRENT; GATE DIELECTRICS; KNOWLEDGE REPRESENTATION; MOS DEVICES; THRESHOLD VOLTAGE; TRANSCONDUCTANCE; TWO DIMENSIONAL;

MOSFET DEVICES;

EID: 79961223563     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECTECH.2011.5941554     Document Type: Conference Paper

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