Programmable nano-switch array using SiN/GaAs interface traps on a GaAs nanowire network for reconfigurable BDD logic circuits

Microelectronic Engineering

Volumn 88, Issue 8, 2011, Pages 2755-2758

  Shiratori, Yuta ^a   Miura, Kensuke ^a   Kasai, Seiya ^a,b  

^a HOKKAIDO UNIVERSITY   (Japan)

^b JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

Binary decision diagram; GaAs nanowire network; Programmable switch; Reconfigurable circuit

Indexed keywords

GAAS; HYSTERESIS CURVE; INTERFACE TRAPS; METAL GATE; NANOWIRE NETWORKS; ON STATE CURRENT; PROGRAMMABLE SWITCHES; RE-CONFIGURABLE; RECONFIGURABLE CIRCUITS; RETENTION TIME; STABLE OPERATION; SWITCH ARRAYS; SWITCHING CHARACTERISTICS; THIN LAYERS; TIME DEPENDENCE;

GALLIUM ALLOYS; GALLIUM ARSENIDE; NANOWIRES; SEMICONDUCTING GALLIUM; SILICON NITRIDE; SWITCHING CIRCUITS; TIME SWITCHES;

LOGIC CIRCUITS;

EID: 79960064169     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2010.12.007     Document Type: Conference Paper

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