MOS power transistor model for Electromagnetic Susceptibility analysis

Microelectronics Reliability

Volumn 51, Issue 8, 2011, Pages 1356-1364

  Bona, C ^a   Fiori, F ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN SOLUTIONS; DISTRIBUTED GATE RESISTANCE; ELECTROMAGNETIC DISTURBANCES; ELECTROMAGNETIC SUSCEPTIBILITIES; LOOP IMPEDANCE; LUMPED MODELS; POWER TRANSISTORS; RADIO FREQUENCY INTERFERENCE; SMALL SIGNAL EQUIVALENT CIRCUIT; SMALL-SIGNAL ANALYSIS; TIME-DOMAIN SIMULATIONS;

COMPUTER SIMULATION; ELECTROMAGNETIC PULSE; ELECTROMAGNETISM; EQUIVALENT CIRCUITS; MAGNETIC SUSCEPTIBILITY; POWER ELECTRONICS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS; TRANSISTORS;

TIME DOMAIN ANALYSIS;

EID: 79959904774     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2011.03.003     Document Type: Article

References (14)

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