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Microelectronic Engineering

Volumn 88, Issue 7, 2011, Pages 1361-1364

MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate

(6) Wu, Yung Hsien a Chen, Lun Lun a Chen, Wei Chia a Lin, Chia Chun a Wu, Min Lin a Wu, Jia Rong a

a NATIONAL TSING HUA UNIVERSITY (Taiwan)

Author keywords

Ge stabilized tetragonal ZrO2; High gate dielectric; NH3 plasma nitridation; ZrO2 Ge ZrO2 laminate

Indexed keywords

CAPACITANCE-VOLTAGE CHARACTERISTICS; EQUIVALENT OXIDE THICKNESS; FREQUENCY DISPERSION; GATE STACKS; GE-STABILIZED TETRAGONAL ZRO2; INTERFACIAL LAYER; NH3 PLASMA NITRIDATION; POSITIVE BIAS TEMPERATURE INSTABILITIES; SI SUBSTRATES; ZRO2/GE/ZRO2 LAMINATE;

GATE DIELECTRICS; GATES (TRANSISTOR); GERMANIUM; GRAIN BOUNDARIES; INTEGRATED CIRCUITS; MOS DEVICES; PLASMA DIAGNOSTICS; PLASMA STABILITY;

ZIRCONIUM ALLOYS;

EID: 79958051522 PISSN: 01679317 EISSN: None Source Type: Journal
DOI: 10.1016/j.mee.2011.03.056 Document Type: Conference Paper

Times cited : (12)

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