Simple analytical bulk current model for long-channel double-gate junctionless transistors

IEEE Electron Device Letters

Volumn 32, Issue 6, 2011, Pages 704-706

  Duarte, Juan P ^a   Choi, Sung Jin ^a   Moon, Dong Il ^a   Choi, Yang Kyu ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Bulk current; double gate (DG); junctionless (JL) transistor; semiconductor device modeling

Indexed keywords

ANALYTICAL EXPRESSIONS; BULK CURRENT; CHANNEL DOPINGS; CHANNEL POTENTIAL; CURRENT MODELS; DEPLETION APPROXIMATION; DOUBLE GATE; GATE VOLTAGES; JUNCTIONLESS (JL) TRANSISTOR; OHM'S LAW; SEMICONDUCTOR DEVICE MODELING; SIMULATION DATA; SUB-THRESHOLD CURRENT;

COMPUTER SIMULATION; POISSON EQUATION; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DOPING;

TRANSISTORS;

EID: 79957622736     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2011.2127441     Document Type: Article

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