CARAT: Context-aware runtime adaptive task migration for multi core architectures

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2011, Pages 515-520

  Jahn, Janmartin ^a   Al Faruque, M A ^a   Henkel, Jörg ^a  

^a KARLSRUHE INSTITUTE OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE TECHNIQUE; BATTERY CAPACITY; CHIP TEMPERATURE; COMMUNICATION OVERHEADS; CONTEXT-AWARE; DISTRIBUTED MEMORY ARCHITECTURE; DYNAMIC THERMAL MANAGEMENT; EFFICIENCY BENEFITS; ENERGY CONSUMPTION; IN-DEPTH ANALYSIS; LOAD-BALANCING; MEMORY ACCESS; MIGRATION DELAY; MULTI-MEDIA; MULTICORE ARCHITECTURES; PARALLEL EXECUTIONS; RUNTIME ADAPTATION; RUNTIMES; SYSTEM LEVELS; SYSTEM LOADS; TASK MIGRATION;

EMBEDDED SYSTEMS; ENERGY EFFICIENCY; ENERGY UTILIZATION; TEMPERATURE CONTROL;

MEMORY ARCHITECTURE;

EID: 79957566356     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

1. A. Acquaviva et al. Assessing Task Migration Impact on Embedded Soft Real-Time Streaming Multimedia Applications. EURASIP Journal on Embedded Systems, 2008.
2. A. Agarwal. CPU Designers Debate Multi-Core Future. EE Times, 2008.
3. Y. Artsy and R. Finkel. Designing a Process Migration Facility: The Charlotte Experience. Computer, 22(9), 1989.
4. A. Barak. Scalable Cluster Computing with MOSIX, for Linux. In In Proceedings of Linux Expo 99, 1999.
5. S. Bertozzi et al. Supporting task migration in multi-processor systems-on-chip: A feasibility study. In Proceedings of the Conference on Design, Automation and Test in Europe, 2006.
6. S. Borkar. Design perspectives on 22nm CMOS and beyond. In Proceedings of the 46th Design Automation Conference, 2009.
7. P. Bungale et al. An Approach to Heterogeneous Process State Capture/Recovery to Achieve Minimum Performance Overhead During Normal Execution. In Proceedings of Parallel and Distributed Processing Symposium, 2003.
8. D. Cuesta et al. Adaptive Task Migration Policies for Thermal control in MPSoCs,. In Proceedings of the IEEE 2010 Annual Symposium on VLSI, 2010.
9. M. A. A. Faruque, T. Ebi, and J. Henkel. Run-Time Adaptive On- Chip Communication Scheme. In Proceedings of the 2007 IEEE/ACM International Conference on Computer-Aided Design, 2007.
10. M. A. A. Faruque, R. Krist, and J. Henkel. ADAM: Run-Time Agent- Based Distributed Application Mapping for On-Chip Communication. In Proceedings of the 45th Design Automation Conference, 2008.
11. Y. Ge, P. Malani, and Q. Qiu. Distributed Task Migration for Thermal Management in Many-Core Systems . In Proceedings of the 47th Design Automation Conference, 2010.
12. J. Howard et al. A 48-Core IA-32 Message-Passing Processor with DVFS in 45nm CMOS. In Proceedings of the 57th International Solid State Circuits Conference, 2010.
13. G. H. Loh. 3D-Stacked Memory Architectures for Multi-Core Processors. In Proceedings of the 2008 International Symposium on Computer Architecture, 2008.
14. J.-Y. Mignolet et al. Infrastructure for Design and Management of Relocatable Tasks. In Proceedings of the Conference on Design, Automation and Test in Europe, 2003.
15. F. Mulas et al. Thermal Balancing Policy for Multiprocessor Stream Computing Platforms. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 28(12), 2009.
16. V. Nollet et al. Centralized Run-Time Resource Management in a Network-on-Chip Containing Reconfigurable Hardware Tiles. In Proceedings of the Conference on Design, Automation and Test in Europe, 2005.
17. M. Richmond and M. Hitchens. A new process migration algorithm. SIGOPS Operating Systems Review, 31(1), 1997.
18. J. M. Smith. A Survey of Process Migration Mechanisms. SIGOPS Operating Systems Review, 22(3), 1988.
19. V. Soteriou and L.-S. Peh. Design-Space Exploration of Power- Aware On/Off Interconnection Networks. In Proceedings of the IEEE International Conference on Computer Design, 2004.
20. S. R. White et al. Autonomic Computing: Architectural Approach and Prototype. Integrated Computer-Aided Engineering, 13(2):173-188, 2006.