Distributed task migration for thermal management in many-core systems

Proceedings - Design Automation Conference

Volumn , Issue , 2010, Pages 579-584

  Ge, Yang ^a   Malani, Parth ^a   Qiu, Qinru ^a  

^a BINGHAMTON UNIVERSITY   (United States)

Author keywords

Distributed control; Dynamic thermal management; Prediction

Indexed keywords

BALANCED WORK-LOAD; DEEP SUB-MICRON; DISTRIBUTED CONTROL; DISTRIBUTED TASKS; DYNAMIC THERMAL MANAGEMENT; HOTSPOTS; IMPACT SYSTEM; LEAKAGE POWER; LOW COSTS; MANY-CORE; NEAREST NEIGHBORS; PREDICTION; STATE EXPLOSION; SYSTEM COMPLEXITY; TASK MIGRATION; TEMPERATURE GRADIENT; THERMAL EMERGENCIES; THERMAL HOT SPOTS; THERMAL MANAGEMENT; THERMAL PROFILES; WORKLOAD BALANCE;

COMPUTER AIDED DESIGN; DISTRIBUTED PARAMETER CONTROL SYSTEMS; THERMAL GRADIENTS; THERMOANALYSIS;

TEMPERATURE CONTROL;

EID: 77956192486     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837417     Document Type: Conference Paper

References (14)

1. S. Borkar, "Thousand Core Chips - A Technology Perspective," In Proc. Design Automation Conference, June 2007.
2. D. Brooks and M. Martonosi, "Dynamic Thermal Management for High Performance Microprocessors," In Proc. Int. Symp. High Performance Computer Architecture, pages 171-182, Jan. 2001.
3. D. Brooks, V. Tiwari and M. Martonosi, "Wattch: A Framework for Architectural Level Power Analysis and Optimizations," In Proc. Int. Symp. Computer Architecture, pages 83-94, June 2000.
4. A. Coskun, T. Rosing and K. Gross, "Proactive Temperature Management in MPSoCs," In Proc. Int. Symp. on Low Power Electronics and Design, pages 165-170, Aug. 2008.
5. J. Donald and M. Martonosi, "Techniques for Multicore Thermal Management: Classification and New Exploration," In Proc. Int. Symp. Computer Architecture, pages 78-88, June 2006.
6. T. Ebi, M. Faruque and J. Henekl, "TAPE: Thermal-Aware Agent- Based Power Economy for Muti/Many-Core Architectures", In Proc. Int. Conf. on Computer-Aided Design, pages 302-309, Nov. 2009.
7. R. Jayaseelan, T. Mitra, "Dynamic Thermal Management via Architectural Adaption", In Proc. Design Automation Conference, pages 484-489, Jul. 2009.
8. F. Mulas, M. Pittau, M. Buttu, S. Carta, A. Acquaviva, L. Benini, D. Atienza and G. De Micheli, "Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures," In Proc. Design Automation and Test in Europe, pages 734-739, March 2008.
9. K. Skadron, M. Stan, K. Sankaranarayanan, W. Huang, S. Velusamy and D. Tarjan, "Temperature-Aware Microarchitecture: Modeling and Implementation," ACM Trans. on Architecture and Code Optimization, Vol.1 Issue 1, pages 94-125,Mar. 2004.
10. S. Vangal, J. Howard, G. Ruhl, S. Dighe, H. Wilson, J. Tschanz, D. Finan, P. Lyer, A. Singh, T. Jacob, S. Jain, S. Venkataraman, Y. Hoskote and N. Borkar "An 80-Tile 1.28 TFLOPS Network-on-Chip in 65nm CMOS," In Proc. Int. Solid-State Circuits Conf., pages 98-589, Feb. 2007.
11. I. Yeo, C. Liu and E. Kim "Predictive Dynamic Thermal Management for Multicore Systems," In Proc. Design Automation Conf., pages 734-739, June 2008.
12. L. Shang, L. Peh, A. Kumar and N. Jha, "Thermal Modeling, Characterization and Management of On-chip Networks," In Proc. Int. Symp. Microarchitecture, Dec., 2004.
13. W. Dally, B. Towles "Route packets, not wires: on-chip interconnection networks," In Proc. Design Automation Conf., Jun. 2001.
14. S. Liu, J. zhang, Q. Wu and Q. Qiu, "Thermal-Aware Job Allocation and Scheduling for Three Dimensional Chip Multiprocessor," in Proc. International Symposium on Quality Electronic Design, Mar. 2010