메뉴 건너뛰기




Volumn 46, Issue 5, 2011, Pages 1147-1157

An all-digital 12 pJ/Pulse IR-UWB transmitter synthesized from a standard cell library

Author keywords

All digital; impulse radio (IR); standard cell; synthesis; transmitter; ultra wideband (UWB)

Indexed keywords

ACTIVE ENERGY; ALL-DIGITAL; CELL-BASED; CENTER FREQUENCY; CMOS PROCESSS; CORE AREA; DESIGN TOOL; DIGITAL STANDARDS; DIGITALLY CONTROLLED OSCILLATORS; FUNCTIONAL BLOCK; IMPULSE RADIO ULTRA-WIDEBAND; IMPULSE RADIOS; LEAKAGE POWER; STANDARD CELL; SYNTHESIS; UWB PULSE; UWB TRANSMITTER;

EID: 79955604140     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2011.2112232     Document Type: Conference Paper
Times cited : (72)

References (24)
  • 4
    • 77952137361 scopus 로고    scopus 로고
    • A 3 MHz-BW 3.6 GHz digital franctional-N PLL with sub-gate-delay TDC, phaseinterpolation divider, and digital mismatch cancellation
    • M. Zanuso, S. Levantino, C. Samori, and A. Lacaita, "A 3 MHz-BW 3.6 GHz digital franctional-N PLL with sub-gate-delay TDC, phaseinterpolation divider, and digital mismatch cancellation", in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2010, pp. 476-477.
    • (2010) IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers , pp. 476-477
    • Zanuso, M.1    Levantino, S.2    Samori, C.3    Lacaita, A.4
  • 5
    • 77952193678 scopus 로고    scopus 로고
    • A 1.4 psrms-period-jitter TDC-Less fractional-N digital PLL with digitally controlled ring oscillator in 65 nm CMOS
    • W. Grollitsch, R. Nonis, and N. D. Dalt, "A 1.4 psrms-period-jitter TDC-Less fractional-N digital PLL with digitally controlled ring oscillator in 65 nm CMOS", in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2010, pp. 478-479.
    • (2010) IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers , pp. 478-479
    • Grollitsch, W.1    Nonis, R.2    Dalt, N.D.3
  • 6
    • 0141954044 scopus 로고    scopus 로고
    • Background calibration techniques for multistage pipelined ADCs with digital redundancy
    • Sep.
    • J. Li and U.-K. Moon, "Background calibration techniques for multistage pipelined ADCs with digital redundancy", IEEE Trans. Circuits Syst. II, vol. 50, no. 9, pp. 531-538, Sep. 2003.
    • (2003) IEEE Trans. Circuits Syst. II , vol.50 , Issue.9 , pp. 531-538
    • Li, J.1    Moon, U.-K.2
  • 7
    • 29044434354 scopus 로고    scopus 로고
    • 'Split ADC' architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC
    • Dec.
    • J. McNeill et al., "'Split ADC' architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC", IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2437-2445, Dec. 2005.
    • (2005) IEEE J. Solid-State Circuits , vol.40 , Issue.12 , pp. 2437-2445
    • McNeill, J.1
  • 8
    • 49549097630 scopus 로고    scopus 로고
    • A 1 V 11b 200 MS/s pipelined ADC with digital background calibration in 65 nm CMOS
    • K.-W. Hsueh et al., "A 1 V 11b 200 MS/s pipelined ADC with digital background calibration in 65 nm CMOS", in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2008, pp. 547-548.
    • (2008) IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers , pp. 547-548
    • Hsueh, K.-W.1
  • 11
    • 59349115618 scopus 로고    scopus 로고
    • A 750 Mb/s, 12 pJ/b, 6-to-10 GHz CMOS IR-UWB transmitter with embedded on-chip antenna
    • Feb.
    • V. V. Kulkarni, M. Muqsith, K. Niitsu, H. Ishikuro, and T. Kuroda, "A 750 Mb/s, 12 pJ/b, 6-to-10 GHz CMOS IR-UWB transmitter with embedded on-chip antenna", IEEE J. Solid-State Circuits, vol. 44, pp. 394-403, Feb. 2009.
    • (2009) IEEE J. Solid-State Circuits , vol.44 , pp. 394-403
    • Kulkarni, V.V.1    Muqsith, M.2    Niitsu, K.3    Ishikuro, H.4    Kuroda, T.5
  • 12
    • 67649643464 scopus 로고    scopus 로고
    • An energy-efficient all-digital uwb transmitter employing dual capacitively-coupled pulseshaping drivers
    • Jun.
    • P. P. Mercier, D. C. Daly, and A. P. Chandrakasan, "An energy-efficient all-digital uwb transmitter employing dual capacitively-coupled pulseshaping drivers", IEEE J. Solid-State Circuits, vol. 44, pp. 1679-1688, Jun. 2009.
    • (2009) IEEE J. Solid-State Circuits , vol.44 , pp. 1679-1688
    • Mercier, P.P.1    Daly, D.C.2    Chandrakasan, A.P.3
  • 15
    • 33947304787 scopus 로고    scopus 로고
    • Spectral shaping of UWB signals for time-hopping impulse radio
    • DOI 10.1109/JSAC.2005.863817
    • Y. Nakache and A. Molisch, "Spectral shaping of UWB signals for time hopping impulse radio", IEEE J. Sel. Areas Commun., vol. 24, no. 4, pp. 738-744, Apr. 2006. (Pubitemid 46438067)
    • (2006) IEEE Journal on Selected Areas in Communications , vol.24 , Issue.4 I , pp. 738-744
    • Nakache, Y.-P.1    Molisch, A.F.2
  • 17
    • 0028756124 scopus 로고
    • Modeling the "effective capacitance" for the RC interconnect of CMOS gates
    • Dec.
    • J. Qian, S. Pullela, and L. Pillage, "Modeling the "effective capacitance" for the RC interconnect of CMOS gates", IEEE Trans. Computer-Aid. Des. Integr. Circuits Syst., vol. 13, no. 12, pp. 1526-1535, Dec. 1994.
    • (1994) IEEE Trans. Computer-Aid. Des. Integr. Circuits Syst. , vol.13 , Issue.12 , pp. 1526-1535
    • Qian, J.1    Pullela, S.2    Pillage, L.3
  • 19
    • 34648831866 scopus 로고    scopus 로고
    • Closed-form RC and RLC delay models considering input rise time
    • DOI 10.1109/TCSI.2007.902539
    • S. Kim and S. S. Wong, "Closed-form RC and RLC delay models considering input rise time", IEEE Trans. Circuits Syst. I, vol. 54, no. 9, pp. 2001-2010, Sep. 2007. (Pubitemid 47456040)
    • (2007) IEEE Transactions on Circuits and Systems I: Regular Papers , vol.54 , Issue.9 , pp. 2001-2010
    • Kim, S.Y.1    Wong, S.S.2
  • 20
    • 34748823693 scopus 로고
    • The transient response of damped linear network with particular regard to wideband amplifiers
    • W. C. Elmore, "The transient response of damped linear network with particular regard to wideband amplifiers", J. Appl. Phys., 1948.
    • (1948) J. Appl. Phys.
    • Elmore, W.C.1
  • 21
    • 79955636327 scopus 로고    scopus 로고
    • An explicit RC-circuit delay approximation based on the first three moments of the impulse response
    • B. Tutuianu, F. Dartu, and L. Pileggi, "An explicit RC-circuit delay approximation based on the first three moments of the impulse response", in Proc. IEEE/ACM Design Automation Conf., 1998, pp. 463-368.
    • (1998) Proc. IEEE/ACM Design Automation Conf. , pp. 463-368
    • Tutuianu, B.1    Dartu, F.2    Pileggi, L.3
  • 22
    • 0029221808 scopus 로고
    • Two-pole analysis of interconnection trees
    • Jan.
    • A. B. Kahng and S. Muddu, "Two-pole analysis of interconnection trees", in IEEE Multi-Ship Module Conf, Jan. 1995, pp. 105-110.
    • (1995) IEEE Multi-Ship Module Conf. , pp. 105-110
    • Kahng, A.B.1    Muddu, S.2
  • 23
    • 0029696654 scopus 로고    scopus 로고
    • An analytical delay model for RLC interconnects
    • May
    • A. B. Kahng and S. Muddu, "An analytical delay model for RLC interconnects", in IEEE Int. Symp. Circuits Syst., May 1996, pp. 4237-4240.
    • (1996) IEEE Int. Symp. Circuits Syst. , pp. 4237-4240
    • Kahng, A.B.1    Muddu, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.