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Volumn , Issue , 2011, Pages 32-39
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Quantifying thread vulnerability for multicore architectures
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Author keywords
Fault tolerance; multithreading; Reliability
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Indexed keywords
APPLICATION DOMAINS;
ARCHITECTURAL COMPONENTS;
EXECUTION CYCLES;
EXPERIMENTAL EVALUATION;
LOW-POWER OPERATING MODES;
MODERN ARCHITECTURES;
MULTI-CORE MACHINES;
MULTI-CORES;
MULTI-THREADED APPLICATION;
MULTICORE ARCHITECTURES;
MULTITHREADING;
REGISTER FILES;
SOURCE CODES;
TRANSIENT ERRORS;
TRANSISTOR SIZE;
FAULT TOLERANCE;
NETWORK ARCHITECTURE;
SOFTWARE ARCHITECTURE;
QUALITY ASSURANCE;
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EID: 79954985942
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/PDP.2011.75 Document Type: Conference Paper |
Times cited : (3)
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References (10)
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