Quantifying thread vulnerability for multicore architectures

Proceedings - 19th International Euromicro Conference on Parallel, Distributed, and Network-Based Processing, PDP 2011

Volumn , Issue , 2011, Pages 32-39

  Oz, Isil ^a   Topcuoglu, Haluk Rahmi ^b   Kandemir, Mahmut ^c   Tosun, Oguz ^a  

^a BOGAZICI UNIVERSITY   (Turkey)

^b MARMARA UNIVERSITY   (Turkey)

^c The Center for Nanotechnology Education and Utilization   (United States)

Author keywords

Fault tolerance; multithreading; Reliability

Indexed keywords

APPLICATION DOMAINS; ARCHITECTURAL COMPONENTS; EXECUTION CYCLES; EXPERIMENTAL EVALUATION; LOW-POWER OPERATING MODES; MODERN ARCHITECTURES; MULTI-CORE MACHINES; MULTI-CORES; MULTI-THREADED APPLICATION; MULTICORE ARCHITECTURES; MULTITHREADING; REGISTER FILES; SOURCE CODES; TRANSIENT ERRORS; TRANSISTOR SIZE;

FAULT TOLERANCE; NETWORK ARCHITECTURE; SOFTWARE ARCHITECTURE;

QUALITY ASSURANCE;

EID: 79954985942     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PDP.2011.75     Document Type: Conference Paper

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