Energy-aware loop parallelism maximization for multi-core DSP architectures

Proceedings - 2010 IEEE/ACM International Conference on Green Computing and Communications, GreenCom 2010, 2010 IEEE/ACM International Conference on Cyber, Physical and Social Computing, CPSCom 2010

Volumn , Issue , 2010, Pages 205-212

  Qiu, Meikang ^a   Niu, Jian Wei ^b   Yang, Laurence T ^c   Qin, Xiao ^d   Zhang, Senlin ^e   Wang, Bin ^f  

^a UNIVERSITY OF KENTUCKY   (United States)

^b BEIHANG UNIVERSITY   (China)

^c ST FRANCIS XAVIER UNIVERSITY   (Canada)

^d AUBURN UNIVERSITY   (United States)

^e ZHEJIANG UNIVERSITY   (China)

^f Wright State University   (United States)

Author keywords

Energy; Loop parallelization; Multi core; Retiming; Voltage assignment

Indexed keywords

ENERGY; MULTI CORE; PARALLELIZATIONS; RETIMING; VOLTAGE ASSIGNMENT;

ALGORITHMS; EMBEDDED SOFTWARE; ENERGY UTILIZATION; OPTIMIZATION; SIGNAL PROCESSING; SYSTEMS ANALYSIS;

MULTIMEDIA SIGNAL PROCESSING;

EID: 79953104189     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/GreenCom-CPSCom.2010.87     Document Type: Conference Paper

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