Emerging memory technologies for reconfigurable routing in FPGA architecture

2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings

Volumn , Issue , 2010, Pages 62-65

  Gaillardon, Pierre Emmanuel ^a   Ben Jamaa, M Haykel ^a   Betti Beneventi, Giovanni ^a   Clermidy, Fabien ^a   Pemiola, Luca ^a  

^a CEA GRENOBLE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

AREA SAVINGS; COMPLEX CIRCUITS; DELAY REDUCTION; ELEMENTARY CIRCUITS; FPGA ARCHITECTURES; MEMORY NODES; MEMORY TECHNOLOGY; NON-VOLATILE; ON-RESISTANCE; RE-CONFIGURABLE; SRAM MEMORIES; SWITCH BOX;

DELAY CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MEMORY ARCHITECTURE; PHASE CHANGE MEMORY; RECONFIGURABLE HARDWARE; SWITCHING CIRCUITS;

STATIC RANDOM ACCESS STORAGE;

EID: 79953082323     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2010.5724454     Document Type: Conference Paper

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