A novel flash-based FPGA technology with deep trench isolation

2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop, Proceedings, NVSMW

Volumn , Issue , 2007, Pages 32-33

  Kyung, Joon Han ^a   Chan, Nigel ^a   Kim, Sungrae ^a   Leung, Ben ^a   Hecht, Volker ^a   Cronquist, Brian ^a   Shum, Danny ^b   Tilke, Armin ^b   Pescini, Laura ^c   Stiftinger, Martin ^c   Kakoschke, Ronald ^c  

^a Actel Corp   (United States)

^b Infineon Technologies Dresden

^c INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CELL SIZES; DEEP TRENCH ISOLATION (DTI); DESIGN RULES; ELECTRICAL CHARACTERISTICS; FIELD PROGRAMMABLE GATE ARRAY (FPGA); FN PROGRAMMING; GATE INDUCED DRAIN LEAKAGE (GIDL); NON-VOLATILE; SEMICONDUCTOR MEMORIES;

DATA STORAGE EQUIPMENT; ELECTRIC CONDUCTIVITY; ELECTRIC CURRENTS; SEMICONDUCTOR MATERIALS; SEMICONDUCTOR STORAGE; TENSORS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 48649101086     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NVSMW.2007.4290569     Document Type: Conference Paper

References (4)

1. R. Lipp, R. Freeman, T. Saxe, IEEE 2000 Custom Integrated Circuits Conference, 2000.
2. V. Klee et al, IEEE IEDM Tech. Dig., pp. 407, 2001.
3. A. Tilke et al, Solid-State Electronics, v48, 12, pp. 2243-2249, Dec. 2004.
4. D. Shum et al, IEEE IEDM Tech. Dig, pp. 344-346, 2005.