A 65nm flash-based FPGA fabric optimized for low cost and power

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2011, Pages 87-95

  Greene, Jonathan ^a   Kaptanoglu, Sinan ^a   Feng, Wenyi ^a   Hecht, Volker ^a   Landry, Joel ^a   Li, Fei ^a   Krouglyanskiy, Anton ^a   Morosan, Mihai ^a   Pevzner, Val ^a  

^a MICROSEMI CORPORATION   (United States)

Author keywords

Built in self test; Clos network; Flash memory; FPGA architecture; IIB; Input interconnection block; Packing; Programmable routing

Indexed keywords

CLOS NETWORK; FPGA ARCHITECTURES; IIB; INPUT INTERCONNECTION BLOCK; PROGRAMMABLE ROUTING;

BUILT-IN SELF TEST; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC GATES; MEMORY ARCHITECTURE; NETWORK ARCHITECTURE; OPTIMIZATION; STATIC RANDOM ACCESS STORAGE;

FLASH MEMORY;

EID: 79952977455     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1950413.1950434     Document Type: Conference Paper

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