A 32-Gb MLC NAND flash memory with Vth endurance enhancing schemes in 32 nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 46, Issue 1, 2011, Pages 97-106

  Lee, Changhyuk ^a   Lee, Sok Kyu ^a   Ahn, Sunghoon ^a   Lee, Jinhaeng ^a   Park, Wonsun ^a   Cho, Yongdeok ^a   Jang, Chaekyu ^a   Yang, Chulwoo ^a   Chung, Sanghwa ^a   Yun, In Suk ^a   Joo, Byoungin ^a   Jeong, Byoungkwan ^a   Kim, Jeeyul ^a   Kwon, Jeakwan ^a   Jin, Hyunjong ^a   Noh, Yujong ^a   Ha, Jooyun ^a   Sung, Moonsoo ^a   Choi, Daeil ^a   Kim, Sanghwan ^a   Choi, Jeawon ^a   Jeon, Taeho ^a   Park, Heejoung ^a   Yang, Joong Seob ^a   Koh, Yo Hwan ^a   more..

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

Adaptive code selection; cell to cell interference; moving read; MSB re program; NAND flash

Indexed keywords

ADAPTIVE CODE SELECTIONS; CHARGE LOSS; CMOS PROCESS TECHNOLOGY; CURRENT CONSUMPTION; CURRENT REDUCTION; FLOATING GATES; MOVING READ; MSB RE-PROGRAM; NAND FLASH; NAND FLASH MEMORY; PROGRAM OPERATION; THRESHOLD VOLTAGE DISTRIBUTION;

CMOS INTEGRATED CIRCUITS; DURABILITY; ELECTRIC COILS; MICROPROCESSOR CHIPS; NAND CIRCUITS; THRESHOLD VOLTAGE; VOLTAGE DISTRIBUTION MEASUREMENT; VOLTAGE DIVIDERS;

FLASH MEMORY;

EID: 78650858389     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2010.2084450     Document Type: Conference Paper

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