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Volumn , Issue , 2009, Pages 246-248

A 5.6MB/s 64Gb 4b/Cell NAND flash memory in 43nm CMOS

(56)  Trinh, C a   Shibata, N b   Nakano, T b   Ogawa, M b   Sato, J b   Takeyama, Y b   Isobe, K b   Le, B a   Moogat, F a   Mokhlesi, N a   Kozakai, K a   Hong, P a   Kamei, T a   Iwasa, K b   Nakai, J b   Shimizu, T b   Honma, M b   Sakai, S b   Kawaai, T b   Hoshi, S b   more..


Author keywords

[No Author keywords available]

Indexed keywords


EID: 70349271258     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2009.4977400     Document Type: Conference Paper
Times cited : (75)

References (5)
  • 2
    • 49549098189 scopus 로고    scopus 로고
    • A 16Gb 3b/Cell NAND flash memory in 56nm with 8MB/s write rate
    • Feb.
    • Y. Li, S. Lee, Y. Fong, et al., "A 16Gb 3b/Cell NAND Flash Memory in 56nm with 8MB/s Write Rate," ISSCC Dig. Tech Papers, pp. 506-507, Feb. 2008.
    • (2008) ISSCC Dig. Tech Papers , pp. 506-507
    • Li, Y.1    Lee, S.2    Fong, Y.3
  • 3
    • 0035054744 scopus 로고    scopus 로고
    • A 3.3V 1Gb multi-level NAND flash with non-uniform threshold voltage distribution
    • Feb.
    • T. Cho, Y-T. Lee, E. Kim, et al., "A 3.3V 1Gb Multi-Level NAND Flash with Non-Uniform Threshold Voltage Distribution," ISSCC Dig. Tech Papers, pp. 28-29, Feb. 2001.
    • (2001) ISSCC Dig. Tech Papers , pp. 28-29
    • Cho, T.1    Lee, Y.-T.2    Kim, E.3
  • 4
    • 49549114895 scopus 로고    scopus 로고
    • A 34MB/s-program-thruput 16Gb MLC NAND with all-bitline architecture in 56nm
    • Feb.
    • R. Cernea, L. Pham, F. Moogat, et al., "A 34MB/s-Program-Thruput 16Gb MLC NAND with All-Bitline Architecture in 56nm," ISSCC Dig. Tech Papers, pp. 420-421, Feb. 2008.
    • (2008) ISSCC Dig. Tech Papers , pp. 420-421
    • Cernea, R.1    Pham, L.2    Moogat, F.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.