Schedulability analysis and task mapping for real-time on-chip communication

Real-Time Systems

Volumn 46, Issue 3, 2010, Pages 360-385

  Shi, Zheng ^a   Burns, Alan ^a  

^a UNIVERSITY OF YORK   (United Kingdom)

Author keywords

On chip network; Real time communication; Schedulability analysis; Wormhole switching

Indexed keywords

ANALYSIS PROCESS; COMMUNICATION PLATFORMS; HARDWARE OVERHEADS; NETWORK TOPOLOGY; ON CHIP COMMUNICATION; ON-CHIP NETWORKS; PERFORMANCE DEGRADATION; POSSIBLE SOLUTIONS; PRIORITY ASSIGNMENT; PRIORITY LEVELS; PRIORITY-BASED; QOS REQUIREMENTS; REAL-TIME COMMUNICATION; RESOURCE SAVINGS; SCHEDULABILITY; SCHEDULABILITY ANALYSIS; TASK MAPPING; TIME BOUND; TIME WINDOWS; WORMHOLE SWITCHING;

ELECTRIC NETWORK TOPOLOGY; QUALITY OF SERVICE;

COMMUNICATION;

EID: 78650706516     PISSN: 09226443     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11241-010-9108-3     Document Type: Conference Paper

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