Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming

Embedded Systems Week 2010 - Proceedings of the 8th IEEE/ACM/IFIP International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CODES+ISSS'2010

Volumn , Issue , 2010, Pages 267-276

  Cordes, Daniel ^a   Marwedel, Peter ^a   Mallik, Arindam ^b  

^a Informatik Centrum Dortmund   (Germany)

^b IMEC   (Belgium)

Author keywords

Automatic parallelization; Embedded software; Hierarchical task graph; Integer linear programming

Indexed keywords

AUTOMATIC PARALLELIZATION; BEST CHOICE; COMPUTATIONAL POWER; ENERGY CONSUMPTION; FOUR-CORE; HARDWARE AND SOFTWARE; HEAT DISSIPATION; INTEGER LINEAR PROGRAMMING; MULTI-PROCESSOR PLATFORMS; MULTIPROCESSOR SYSTEM ON CHIPS; OVERALL EXECUTION; PARALLELIZATION TOOLS; RESOURCE-CONSTRAINED; SEQUENTIAL APPLICATIONS; SEQUENTIAL PROGRAMS; TASK GRAPH; HIERARCHICAL TASK GRAPH;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BENCHMARKING; EMBEDDED SOFTWARE; ENERGY UTILIZATION; INTEGER PROGRAMMING; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; OPTIMIZATION; TREES (MATHEMATICS); HIERARCHICAL SYSTEMS; LINEAR PROGRAMMING;

EMBEDDED SYSTEMS;

EID: 78650635655     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1878961.1879009     Document Type: Conference Paper

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