Versatile system-level memory-aware platform description approach for embedded MPSoCs

Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Volumn , Issue , 2010, Pages 9-16

  Pyka, Robert ^a   Klein, Felipe ^b   Marwedel, Peter ^c   Mamagkakis, Stylianos ^d  

^a Informatik Centrum Dortmund (ICD)   (Germany)

^b UNIVERSITY OF CAMPINAS   (Brazil)

^c TU DORTMUND UNIVERSITY   (Germany)

^d IMEC   (Belgium)

Author keywords

architecture description; channel; component; configuration; definition; energy models; framework

Indexed keywords

ARCHITECTURE DESCRIPTION; BEHAVIORAL MODEL; COMPONENT CONFIGURATIONS; ENERGY MODEL; INSTRUCTION SET; MEMORY AWARE; MEMORY HIERARCHY; RAPID DEVELOPMENT; RETARGETABLE; SYSTEM MODELING; VERSATILE SYSTEM; WHOLE SYSTEMS;

ARCHITECTURE; COMPUTER ARCHITECTURE; LINGUISTICS; PROGRAM COMPILERS; QUERY LANGUAGES;

EMBEDDED SYSTEMS;

EID: 77954517199     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1755888.1755891     Document Type: Conference Paper

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