A 100kHz-10MHz BW, 78-to-52dB DR,4.6-to-11mW flexible SC ΣΔ modulator in 1.2-V 90-nm CMOS

ESSCIRC 2010 - 36th European Solid State Circuits Conference

Volumn , Issue , 2010, Pages 418-421

  Morgado, Alonso ^a   Del Río, Rocío ^a   De La Rosa, Jose M ^a   Bos, Lynn ^b   Ryckaert, Julien ^b   Van Der Plas, Geert ^b  

^a UNIVERSITY OF SEVILLE   (Spain)

^b IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; DYNAMIC RANGE; LEVEL QUANTIZATION; LOOP FILTER; MULTI-STANDARD; SIGNAL TRANSFER FUNCTION; TWO STAGE; WIRELESS STANDARDS;

CMOS INTEGRATED CIRCUITS; WIMAX;

MODULATORS;

EID: 78650354407     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2010.5619732     Document Type: Conference Paper

References (12)

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3. R.H. Veldhoven: "A Triple-Mode Continuous-Time ΣΔ Modulator With Switched-Capacitor Feedback DAC for a GSM-EDGE/CDMA2000/UMTS Receiver." IEEE J. of Solid-State Circuits, Vol. 38, pp.2069-2076, Dec. 2003.
4. T. Christen et al.: "A 0.13μMOS EDGE/UMTS/WLAN Tri-Mode ΣΔ ADC with -92dB THD". IEEE Int. Solid-State Circuits Conf. - Digest of Technical Papers, pp. 240-241, 2007.
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