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Volumn , Issue , 2010, Pages 358-361

A 4.4pJ/access 80MHz, 2K word x 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications

Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; BIT LINES; ENERGY CONSUMPTION; LOCAL SENSE AMPLIFIERS; LOW ENERGY CONSUMPTION; READ OPERATION; SENSE AMPLIFIER; WIRELESS SENSOR; WIRELESS SENSOR NODE;

EID: 78650314880     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2010.5619717     Document Type: Conference Paper
Times cited : (11)

References (7)
  • 3
    • 67651165361 scopus 로고    scopus 로고
    • A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM with 850 MHz Boost Mode in 90 nm CMOS with Tunable Sense Amplifiers
    • July
    • S.Cosemans, W.Dehaene, F.Catthoor, "A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers," IEEE J.Solid-State Circuits, pp. 2065-2077, July 2009.
    • (2009) IEEE J.Solid-State Circuits , pp. 2065-2077
    • Cosemans, S.1    Dehaene, W.2    Catthoor, F.3
  • 4
    • 20444436009 scopus 로고    scopus 로고
    • A Low-Power SRAM Using Hierarchical Bit Line and Local Sense Amplifiers
    • June
    • B.D. Yang & L.S. Kim, "A Low-Power SRAM Using Hierarchical Bit Line and Local Sense Amplifiers," IEEE J.Solid-State Circuits, pp. 1366-1376, June 2005.
    • (2005) IEEE J.Solid-State Circuits , pp. 1366-1376
    • Yang, B.D.1    Kim, L.S.2
  • 6
    • 85008054031 scopus 로고    scopus 로고
    • A 256kb 65nm 8T Subthreshold SRAM employing Sense-Amplifier Redundancy
    • Jan
    • N.Verma, A.Chandrakasan, "A 256kb 65nm 8T Subthreshold SRAM employing Sense-Amplifier Redundancy," IEEE J.Solid-State Circuits pp. 141-149, Jan 2008.
    • (2008) IEEE J.Solid-State Circuits , pp. 141-149
    • Verma, N.1    Chandrakasan, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.