Experimental and simulation study of the program efficiency of HfO 2 based charge trapping memories

2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010

Volumn , Issue , 2010, Pages 408-411

  Spiga, Sabina ^a   Congedo, Gabriele ^a   Russo, Ugo ^a   Lamperti, Alessio ^a   Salicio, Olivier ^a   Driussi, Francesco ^b   Vianello, Elisa ^b  

^a LABORATORIO MDM   (Italy)

^b UNIVERSITY OF UDINE   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE TRAPPING MEMORIES; GATE STACKS; HIGH DIELECTRIC CONSTANTS; HIGH TEMPERATURE; INJECTION CONDITIONS; NON-VOLATILE MEMORIES; PHYSICAL PROCESS; PHYSICAL THICKNESS; PROGRAM EFFICIENCY; SIMULATION STUDIES; THERMAL BUDGET; TRAPPING EFFICIENCIES; TRAPPING LAYERS;

BUDGET CONTROL; CHARGE TRAPPING; HAFNIUM COMPOUNDS; SILICON COMPOUNDS; SOLID STATE DEVICES;

MODELS;

EID: 78649968139     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2010.5618194     Document Type: Conference Paper

References (11)

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