-
1
-
-
0022678067
-
Distributed discrete-event simulation
-
J. Misra, "Distributed discrete-event simulation," ACM Computing Survey, vol. 18, no. 1, pp. 39-65, 1986.
-
(1986)
ACM Computing Survey
, vol.18
, Issue.1
, pp. 39-65
-
-
Misra, J.1
-
2
-
-
84938020780
-
Distributed simulation: A case study in design and verification of distributed programs
-
K. M. Chandy and J. Misra, "Distributed simulation: A case study in design and verification of distributed programs," IEEE Transaction on Software Engineering, vol. SE-5, no. 5, pp. 440-452, 1979.
-
(1979)
IEEE Transaction on Software Engineering
, vol.SE-5
, Issue.5
, pp. 440-452
-
-
Chandy, K.M.1
Misra, J.2
-
4
-
-
34250831093
-
Avoiding message-dependent deadlock in network-based systems on chip
-
pp. Article ID 95 859, May hindawi Publishing Corporation
-
A. Hansson, K. Goossens, and A. Rǎdulescu, "Avoiding message-dependent deadlock in network-based systems on chip," VLSI Design, vol. 2007, pp. Article ID 95 859, 10 pages, May 2007, hindawi Publishing Corporation.
-
(2007)
VLSI Design
, vol.2007
, pp. 10
-
-
Hansson, A.1
Goossens, K.2
Rǎdulescu, A.3
-
5
-
-
0026000660
-
A calculus for network delay. i. network elements in isolation
-
[Online]. Available
-
R. L. Cruz, "A calculus for network delay. i. network elements in isolation," Information Theory, IEEE Transactions on, vol. 37, no. 1, pp. 114-131, 1991. [Online]. Available: http://dx.doi.org/10.1109/18.61109
-
(1991)
Information Theory, IEEE Transactions on
, vol.37
, Issue.1
, pp. 114-131
-
-
Cruz, R.L.1
-
6
-
-
0033682521
-
Real-time calculus for scheduling hard real-time systems
-
L. Thiele, S. Chakraborty, and M. Naedele, "Real-time calculus for scheduling hard real-time systems," in in ISCAS, 2000, pp. 101-104.
-
(2000)
In ISCAS
, pp. 101-104
-
-
Thiele, L.1
Chakraborty, S.2
Naedele, M.3
-
7
-
-
78449290122
-
-
University of California, Berkeley, Tech. Rep. UCB/EECS-2009-59, May [Online]. Available
-
D. Bui, A. Pinto, and E. A. Lee, "On-time network on-chip: Analysis and architecture," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2009-59, May 2009. [Online]. Available: http://www.eecs. berkeley.edu/Pubs/TechRpts/2009/EECS-2009-59.html
-
(2009)
On-time Network On-chip: Analysis and Architecture
-
-
Bui, D.1
Pinto, A.2
Lee, E.A.3
-
8
-
-
63649086617
-
Predictable programming on a precision timed architecture
-
New York, NY, USA: ACM
-
B. Lickly, I. Liu, S. Kim, H. D. Patel, S. A. Edwards, and E. A. Lee, "Predictable programming on a precision timed architecture," in CASES '08: Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems. New York, NY, USA: ACM, 2008, pp. 137-146.
-
(2008)
CASES '08: Proceedings of the 2008 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
, pp. 137-146
-
-
Lickly, B.1
Liu, I.2
Kim, S.3
Patel, H.D.4
Edwards, S.A.5
Lee, E.A.6
-
9
-
-
34548134817
-
A programming model for time-synchronized distributed real-time systems
-
Washington, DC, USA: IEEE Computer Society
-
Y. Zhao, J. Liu, and E. A. Lee, "A programming model for time-synchronized distributed real-time systems," in RTAS '07: Proceedings of the 13th IEEE Real Time and Embedded Technology and Applications Symposium. Washington, DC, USA: IEEE Computer Society, 2007, pp. 259-268.
-
(2007)
RTAS '07: Proceedings of the 13th IEEE Real Time and Embedded Technology and Applications Symposium
, pp. 259-268
-
-
Zhao, Y.1
Liu, J.2
Lee, E.A.3
-
10
-
-
36348975404
-
Implementation and evaluation of on-chip network architectures
-
P. Gratz, C. Kim, R. Mcdonald, S. W. Keckler, and D. Burger, "Implementation and evaluation of on-chip network architectures," in in International Conference on Computer Design, 2006, pp. 477-484.
-
In International Conference on Computer Design, 2006
, pp. 477-484
-
-
Gratz, P.1
Kim, C.2
Mcdonald, R.3
Keckler, S.W.4
Burger, D.5
-
11
-
-
0038300184
-
A progressive approach to handling message-dependent deadlock in parallel computer systems
-
Y. Ho Song and T. M. Pinkston, "A progressive approach to handling message-dependent deadlock in parallel computer systems," IEEE Trans. Parallel Distrib. Syst., vol. 14, no. 3, pp. 259-275, 2003.
-
(2003)
IEEE Trans. Parallel Distrib. Syst.
, vol.14
, Issue.3
, pp. 259-275
-
-
Ho Song, Y.1
Pinkston, T.M.2
-
12
-
-
85027444965
-
Anatomy of a message in the alewife multiprocessor
-
New York, NY, USA: ACM
-
J. Kubiatowicz and A. Agarwal, "Anatomy of a message in the alewife multiprocessor," in ICS '93: Proceedings of the 7th international conference on Supercomputing. New York, NY, USA: ACM, 1993, pp. 195-206.
-
(1993)
ICS '93: Proceedings of the 7th International Conference on Supercomputing
, pp. 195-206
-
-
Kubiatowicz, J.1
Agarwal, A.2
-
13
-
-
0026867086
-
Active messages: A mechanism for integrated communication and computation
-
New York, NY, USA: ACM
-
T. von Eicken, D. E. Culler, S. C. Goldstein, and K. E. Schauser, "Active messages: a mechanism for integrated communication and computation," in ISCA '92: Proceedings of the 19th annual international symposium on Computer architecture. New York, NY, USA: ACM, 1992, pp. 256-266.
-
(1992)
ISCA '92: Proceedings of the 19th Annual International Symposium on Computer Architecture
, pp. 256-266
-
-
Von Eicken, T.1
Culler, D.E.2
Goldstein, S.C.3
Schauser, K.E.4
-
14
-
-
70349844405
-
Ctc: An end-to-end flow control protocol for multi-core systems-on-chip
-
Washington, DC, USA: IEEE Computer Society
-
N. Concer, L. Bononi, M. Soulie, R. Locatelli, and L. P. Carloni, "Ctc: An end-to-end flow control protocol for multi-core systems-on-chip," in NOCS '09: Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip. Washington, DC, USA: IEEE Computer Society, 2009, pp. 193-202.
-
(2009)
NOCS '09: Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
, pp. 193-202
-
-
Concer, N.1
Bononi, L.2
Soulie, M.3
Locatelli, R.4
Carloni, L.P.5
-
15
-
-
0034848112
-
Route packets, not wires: On-chip interconnection networks
-
New York, NY, USA: ACM
-
W. J. Dally and B. Towles, "Route packets, not wires: on-chip interconnection networks," in DAC '01: Proceedings of the 38th conference on Design automation. New York, NY, USA: ACM, 2001, pp. 684-689.
-
(2001)
DAC '01: Proceedings of the 38th Conference on Design Automation
, pp. 684-689
-
-
Dally, W.J.1
Towles, B.2
-
18
-
-
0026867329
-
The turn model for adaptive routing
-
C. J. Glass and L. M. Ni, "The turn model for adaptive routing," SIGARCH Comput. Archit. News, vol. 20, no. 2, pp. 278-287, 1992.
-
(1992)
SIGARCH Comput. Archit. News
, vol.20
, Issue.2
, pp. 278-287
-
-
Glass, C.J.1
Ni, L.M.2
-
20
-
-
27344456043
-
The Æthereal network on chip: Concepts, architectures, and implementations
-
Sept-Oct
-
K. Goossens, J. Dielissen, and A. Rǎdulescu, "The Æthereal network on chip: Concepts, architectures, and implementations," IEEE Design and Test of Computers, vol. 22, no. 5, pp. 414-421, Sept-Oct 2005.
-
(2005)
IEEE Design and Test of Computers
, vol.22
, Issue.5
, pp. 414-421
-
-
Goossens, K.1
Dielissen, J.2
Rǎdulescu, A.3
-
21
-
-
67650224482
-
Execution strategies for ptides, a programming model for distributed embedded systems
-
Washington, DC, USA: IEEE Computer Society
-
J. Zou, S. Matic, E. A. Lee, T. H. Feng, and P. Derler, "Execution strategies for ptides, a programming model for distributed embedded systems," in RTAS '09: Proceedings of the 2009 15th IEEE Real-Time and Embedded Technology and Applications Symposium. Washington, DC, USA: IEEE Computer Society, 2009, pp. 77-86.
-
(2009)
RTAS '09: Proceedings of the 2009 15th IEEE Real-Time and Embedded Technology and Applications Symposium
, pp. 77-86
-
-
Zou, J.1
Matic, S.2
Lee, E.A.3
Feng, T.H.4
Derler, P.5
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