A case study on modeling and optimizing photolithography stage of semiconductor fabrication process

Quality and Reliability Engineering International

Volumn 26, Issue 7, 2010, Pages 765-774

  Kim, Hyun Jin ^a   Kim, Kwang Jae ^a   Kwak, Doh Soon ^a  

^a Pohang University of Science and Technology (POSTECH)   (South Korea)

Author keywords

process optimization; semiconductor fabrication process; target achievement; uniformity; within wafer variation

Indexed keywords

BATCH PROCESS; CRITICAL DIMENSION; FABRICATION PROCESS; INPUT VARIABLES; LINEAR MODELING; MULTIVARIATE NORMAL; OPERATIONAL DATA; OPTIMAL SETTING; PREDICTED PERFORMANCE; PROCESS OPTIMIZATION; QUALITY MEASURES; SEMICONDUCTOR CHIPS; SEMICONDUCTOR FABRICATION PROCESS; UNIFORMITY; WITHIN-WAFER VARIATION;

BATCH DATA PROCESSING; FABRICATION; PHOTOLITHOGRAPHY; PROCESS CONTROL; RESEARCH; SILICON WAFERS;

OPTIMIZATION;

EID: 78349262648     PISSN: 07488017     EISSN: 10991638     Source Type: Journal    
DOI: 10.1002/qre.1149     Document Type: Conference Paper

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