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Volumn , Issue , 2010, Pages 280-285

Pulsed-latch aware placement for timing-integrity optimization

Author keywords

Physical design; Placement; Pulsed latch

Indexed keywords

ANALYTICAL PLACEMENT; CLOCK SIGNAL; DESIGN PARAMETERS; GROUPING ALGORITHM; INFORMATION-AWARE; LOAD CAPACITANCE; PHYSICAL DESIGN; PLACEMENT; PLACEMENT PROBLEMS; POTENTIAL PULSE; PULSED LATCHES; PULSEWIDTHS; WIRE LENGTH;

EID: 77956219273     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837346     Document Type: Conference Paper
Times cited : (20)

References (18)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.