Validating the Intel® Pentium® 4 microprocessor

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 244-248

  Bentley, B ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODING ERRORS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; FORMAL LOGIC; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; SEMICONDUCTING SILICON; STATISTICAL METHODS;

MICROARCHITECTURES;

MICROPROCESSOR CHIPS;

EID: 0034840742     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378239.378473     Document Type: Conference Paper

References (3)

1. Functional verification methodology for microprocessors using the genesys test-program generator - Application to the x86 microprocessors family
2. Architecture validation for processors
3. Bug root cause analysis for willamette