-
1
-
-
51749101496
-
A 1-V 1.1-μW sensor interface IC for wearable biomedical devices
-
18-21 May
-
X. Zou, X. Xu, J. Tan, L. Yao, Y. Lian, "A 1-V 1.1-μW sensor interface IC for wearable biomedical devices," IEEE International Symposium on Circuits and Systems 2008 (ISCAS), pp. 2725-2728, 18-21 May 2008.
-
(2008)
IEEE International Symposium on Circuits and Systems 2008 (ISCAS)
, pp. 2725-2728
-
-
Zou, X.1
Xu, X.2
Tan, J.3
Yao, L.4
Lian, Y.5
-
2
-
-
34249774029
-
An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes
-
June
-
N. Verma and A. P. Chandrakasan, "An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes," Solid-State Circuits, IEEE Journal of , vol. 42, no. 6, pp. 1196-1205, June 2007.
-
(2007)
Solid-State Circuits, IEEE Journal of
, vol.42
, Issue.6
, pp. 1196-1205
-
-
Verma, N.1
Chandrakasan, A.P.2
-
3
-
-
0032664038
-
A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter
-
May
-
A. M. Abo and P. R. Gray, "A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter," Solid-State Circuits, IEEE Journal of , vol. 34, no. 5, pp. 599-606, May 1999.
-
(1999)
Solid-State Circuits, IEEE Journal of
, vol.34
, Issue.5
, pp. 599-606
-
-
Abo, A.M.1
Gray, P.R.2
-
4
-
-
33847408991
-
A 1V supply successive approximation ADC with rail-to-rail input voltage range
-
23-26 May
-
T. Yoshida, M. Akagi, M. Sasaki,and A. Iwata, "A 1V supply successive approximation ADC with rail-to-rail input voltage range," IEEE International Symposium on Circuits and Systems 2008 (ISCAS), pp. 192-195 Vol. 1, 23-26 May 2005.
-
(2005)
IEEE International Symposium on Circuits and Systems 2008 (ISCAS)
, vol.1
, pp. 192-195
-
-
Yoshida, T.1
Akagi, M.2
Sasaki, M.3
Iwata, A.4
-
5
-
-
49549109409
-
A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC
-
3-7 Feb.
-
M. van Elzakker, E. van Tuijl, P. Geraedts, D. Schinkel, E. Klumperink, and B. Nauta, "A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC," Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International, pp.244-610, 3-7 Feb. 2008.
-
(2008)
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
, pp. 244-610
-
-
Van Elzakker, M.1
Van Tuijl, E.2
Geraedts, P.3
Schinkel, D.4
Klumperink, E.5
Nauta, B.6
-
6
-
-
51349147113
-
A 8-bit 500-KS/s low power SAR ADC for bio-medical applications
-
12-14 Nov.
-
You-Kuang Chang, Chao-Shiun Wang, and Chorng-Kuang Wang, "A 8-bit 500-KS/s low power SAR ADC for bio-medical applications," IEEE Asian Solid-State Circuits Conference 2007 (ASSCC), pp. 228-231, 12-14 Nov. 2007.
-
(2007)
IEEE Asian Solid-State Circuits Conference 2007 (ASSCC)
, pp. 228-231
-
-
Chang, Y.-K.1
Wang, C.-S.2
Wang, C.-K.3
-
7
-
-
34548850306
-
A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS
-
11-15 Feb.
-
J. Craninckx, and G. Van der Plas , "A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS," IEEE ISSCC Dig. Tech. Pap., pp. 246-600, 11-15 Feb. 2007.
-
(2007)
IEEE ISSCC Dig. Tech. Pap.
, pp. 246-600
-
-
Craninckx, J.1
Van Der Plas, G.2
-
8
-
-
0032317771
-
A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range
-
Dec
-
V. Peluso, P. Vancorenland, A. M. Marques, M. S. J. Steyaert, and W. Sansen, "A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range," Solid-State Circuits, IEEE Journal of , vol. 33, no. 12, pp. 1887-1897, Dec 1998.
-
(1998)
Solid-State Circuits, IEEE Journal of
, vol.33
, Issue.12
, pp. 1887-1897
-
-
Peluso, V.1
Vancorenland, P.2
Marques, A.M.3
Steyaert, M.S.J.4
Sansen, W.5
-
9
-
-
33746370097
-
Kickback noise reduction techniques for CMOS latched comparators
-
July
-
P. M. Figueiredo, J. C. Vital, "Kickback noise reduction techniques for CMOS latched comparators," Circuits and Systems II: Express Briefs, IEEE Transactions on , vol. 53, no. 7, pp. 541-545, July 2006.
-
(2006)
Circuits and Systems II: Express Briefs, IEEE Transactions on
, vol.53
, Issue.7
, pp. 541-545
-
-
Figueiredo, P.M.1
Vital, J.C.2
-
10
-
-
34748918257
-
A 65-fJ/Conversion-Step 0.9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC
-
Oct.
-
Hao-Chiao Hong and Guo-Ming Lee, "A 65-fJ/Conversion-Step 0.9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC," Solid-State Circuits, IEEE Journal of, vol. 42, no. 10, pp. 2161-2168, Oct. 2007.
-
(2007)
Solid-State Circuits, IEEE Journal of
, vol.42
, Issue.10
, pp. 2161-2168
-
-
Hong, H.-C.1
Lee, G.-M.2
-
11
-
-
49549113634
-
A 9.4-ENOB 1V 3.8μW 100kS/s SAR ADC wit htime-domain comparator
-
Feb.
-
A. Agnes, E. Bonizzoni, P. Malcovati, and F. Maloberti, "A 9.4-ENOB 1V 3.8μW 100kS/s SAR ADC wit htime-domain comparator," IEEE ISSCC Dig. Tech. Pap., pp. 246-247, Feb. 2008.
-
(2008)
IEEE ISSCC Dig. Tech. Pap.
, pp. 246-247
-
-
Agnes, A.1
Bonizzoni, E.2
Malcovati, P.3
Maloberti, F.4
-
12
-
-
0030572204
-
Nonredundant successive approximation register for A/D converters
-
Rossi, A.; Fucili, G., "Nonredundant successive approximation register for A/D converters ," Electronics Letters , vol.32, no.12, pp.1055-1057, 6 Jun 1996. (Pubitemid 126511215)
-
(1996)
Electronics Letters
, vol.32
, Issue.12
, pp. 1055-1057
-
-
Rossi, A.1
Fucili, G.2
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